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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2019 NXP
*/
/dts-v1/;
#include "imx8mm-evk.dts"
/ {
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
m4_reserved: m4@0x80000000 {
no-map;
reg = <0 0x80000000 0 0x1000000>;
};
rpmsg_reserved: rpmsg@0xb8000000 {
no-map;
reg = <0 0xb8000000 0 0x400000>;
};
rpmsg_dma_reserved:rpmsg_dma@0xb8400000 {
compatible = "shared-dma-pool";
no-map;
reg = <0 0xb8400000 0 0x100000>;
};
};
sound-wm8524 {
status = "disabled";
};
wm8524: audio-codec {
status = "disabled";
};
rpmsg_i2s: rpmsg-i2s {
compatible = "fsl,imx8mq-rpmsg-i2s";
/* the audio device index in m4 domain */
fsl,audioindex = <0> ;
fsl,dma-buffer-size = <0x6000000>;
fsl,enable-lpa;
status = "okay";
};
sound-rpmsg {
compatible = "fsl,imx-audio-rpmsg";
model = "ak4497-audio";
cpu-dai = <&rpmsg_i2s>;
rpmsg-out;
};
};
&clk {
init-on-array = <IMX8MM_CLK_UART4_ROOT
IMX8MM_CLK_AHB IMX8MM_CLK_DRAM_CORE
IMX8MM_CLK_NOC IMX8MM_CLK_NOC_APB
IMX8MM_CLK_USB_BUS
IMX8MM_CLK_MAIN_AXI IMX8MM_CLK_AUDIO_AHB
IMX8MM_CLK_DRAM_APB IMX8MM_CLK_A53_DIV
IMX8MM_ARM_PLL_OUT IMX8MM_CLK_DISP_AXI
IMX8MM_CLK_DISP_APB
>;
};
/*
* ATTENTION: M4 may use IPs like below
* ECSPI0/ECSPI2, GPIO1/GPIO5, GPT1, I2C3, I2S3, WDOG1, UART4, PWM3, SDMA1
*/
&i2c3 {
status = "disabled";
};
&rpmsg{
/*
* 64K for one rpmsg instance:
* --0xb8000000~0xb800ffff: pingpong
*/
vdev-nums = <1>;
reg = <0x0 0xb8000000 0x0 0x10000>;
memory-region = <&rpmsg_dma_reserved>;
status = "okay";
};
&sdma1{
status = "disabled";
};
&uart4 {
status = "disabled";
};
&sdma3 {
status = "disabled";
};
&sai3 {
status = "disabled";
};
&sai1 {
status = "disabled";
};
&flexspi {
status = "disabled";
};
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