1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
|
/*
* Copyright 2005-2010 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/*!
* @file ipu_device.c
*
* @brief This file contains the IPUv3 driver device interface and fops functions.
*
* @ingroup IPU
*/
#include <linux/types.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/err.h>
#include <linux/spinlock.h>
#include <linux/delay.h>
#include <linux/clk.h>
#include <linux/poll.h>
#include <linux/sched.h>
#include <linux/time.h>
#include <linux/wait.h>
#include <linux/dma-mapping.h>
#include <linux/io.h>
#include <linux/ipu.h>
#include <asm/cacheflush.h>
#include "ipu_prv.h"
#include "ipu_regs.h"
#include "ipu_param_mem.h"
/* Strucutures and variables for exporting MXC IPU as device*/
static int mxc_ipu_major;
static struct class *mxc_ipu_class;
DEFINE_SPINLOCK(event_lock);
struct ipu_dev_irq_info {
wait_queue_head_t waitq;
int irq_pending;
} irq_info[480];
int register_ipu_device(void);
/* Static functions */
int get_events(ipu_event_info *p)
{
unsigned long flags;
int ret = 0;
spin_lock_irqsave(&event_lock, flags);
if (irq_info[p->irq].irq_pending > 0)
irq_info[p->irq].irq_pending--;
else
ret = -1;
spin_unlock_irqrestore(&event_lock, flags);
return ret;
}
static irqreturn_t mxc_ipu_generic_handler(int irq, void *dev_id)
{
irq_info[irq].irq_pending++;
/* Wakeup any blocking user context */
wake_up_interruptible(&(irq_info[irq].waitq));
return IRQ_HANDLED;
}
static int mxc_ipu_open(struct inode *inode, struct file *file)
{
int ret = 0;
return ret;
}
static int mxc_ipu_ioctl(struct inode *inode, struct file *file,
unsigned int cmd, unsigned long arg)
{
int ret = 0;
switch (cmd) {
case IPU_INIT_CHANNEL:
{
ipu_channel_parm parm;
if (copy_from_user
(&parm, (ipu_channel_parm *) arg,
sizeof(ipu_channel_parm)))
return -EFAULT;
if (!parm.flag) {
ret =
ipu_init_channel(parm.channel,
&parm.params);
} else {
ret = ipu_init_channel(parm.channel, NULL);
}
}
break;
case IPU_UNINIT_CHANNEL:
{
ipu_channel_t ch;
int __user *argp = (void __user *)arg;
if (get_user(ch, argp))
return -EFAULT;
ipu_uninit_channel(ch);
}
break;
case IPU_INIT_CHANNEL_BUFFER:
{
ipu_channel_buf_parm parm;
if (copy_from_user
(&parm, (ipu_channel_buf_parm *) arg,
sizeof(ipu_channel_buf_parm)))
return -EFAULT;
ret =
ipu_init_channel_buffer(
parm.channel, parm.type,
parm.pixel_fmt,
parm.width, parm.height,
parm.stride,
parm.rot_mode,
parm.phyaddr_0,
parm.phyaddr_1,
parm.u_offset,
parm.v_offset);
}
break;
case IPU_UPDATE_CHANNEL_BUFFER:
{
ipu_channel_buf_parm parm;
if (copy_from_user
(&parm, (ipu_channel_buf_parm *) arg,
sizeof(ipu_channel_buf_parm)))
return -EFAULT;
if ((parm.phyaddr_0 != (dma_addr_t) NULL)
&& (parm.phyaddr_1 == (dma_addr_t) NULL)) {
ret =
ipu_update_channel_buffer(
parm.channel,
parm.type,
parm.bufNum,
parm.phyaddr_0);
} else if ((parm.phyaddr_0 == (dma_addr_t) NULL)
&& (parm.phyaddr_1 != (dma_addr_t) NULL)) {
ret =
ipu_update_channel_buffer(
parm.channel,
parm.type,
parm.bufNum,
parm.phyaddr_1);
} else {
ret = -1;
}
}
break;
case IPU_SELECT_CHANNEL_BUFFER:
{
ipu_channel_buf_parm parm;
if (copy_from_user
(&parm, (ipu_channel_buf_parm *) arg,
sizeof(ipu_channel_buf_parm)))
return -EFAULT;
ret =
ipu_select_buffer(parm.channel,
parm.type, parm.bufNum);
}
break;
case IPU_LINK_CHANNELS:
{
ipu_channel_link link;
if (copy_from_user
(&link, (ipu_channel_link *) arg,
sizeof(ipu_channel_link)))
return -EFAULT;
ret = ipu_link_channels(link.src_ch,
link.dest_ch);
}
break;
case IPU_UNLINK_CHANNELS:
{
ipu_channel_link link;
if (copy_from_user
(&link, (ipu_channel_link *) arg,
sizeof(ipu_channel_link)))
return -EFAULT;
ret = ipu_unlink_channels(link.src_ch,
link.dest_ch);
}
break;
case IPU_ENABLE_CHANNEL:
{
ipu_channel_t ch;
int __user *argp = (void __user *)arg;
if (get_user(ch, argp))
return -EFAULT;
ipu_enable_channel(ch);
}
break;
case IPU_DISABLE_CHANNEL:
{
ipu_channel_info info;
if (copy_from_user
(&info, (ipu_channel_info *) arg,
sizeof(ipu_channel_info)))
return -EFAULT;
ret = ipu_disable_channel(info.channel,
info.stop);
}
break;
case IPU_ENABLE_IRQ:
{
uint32_t irq;
int __user *argp = (void __user *)arg;
if (get_user(irq, argp))
return -EFAULT;
ipu_enable_irq(irq);
}
break;
case IPU_DISABLE_IRQ:
{
uint32_t irq;
int __user *argp = (void __user *)arg;
if (get_user(irq, argp))
return -EFAULT;
ipu_disable_irq(irq);
}
break;
case IPU_CLEAR_IRQ:
{
uint32_t irq;
int __user *argp = (void __user *)arg;
if (get_user(irq, argp))
return -EFAULT;
ipu_clear_irq(irq);
}
break;
case IPU_FREE_IRQ:
{
ipu_irq_info info;
if (copy_from_user
(&info, (ipu_irq_info *) arg,
sizeof(ipu_irq_info)))
return -EFAULT;
ipu_free_irq(info.irq, info.dev_id);
irq_info[info.irq].irq_pending = 0;
}
break;
case IPU_REQUEST_IRQ_STATUS:
{
uint32_t irq;
int __user *argp = (void __user *)arg;
if (get_user(irq, argp))
return -EFAULT;
ret = ipu_get_irq_status(irq);
}
break;
case IPU_REGISTER_GENERIC_ISR:
{
ipu_event_info info;
if (copy_from_user
(&info, (ipu_event_info *) arg,
sizeof(ipu_event_info)))
return -EFAULT;
ret =
ipu_request_irq(info.irq,
mxc_ipu_generic_handler,
0, "video_sink", info.dev);
if (ret == 0)
init_waitqueue_head(&(irq_info[info.irq].waitq));
}
break;
case IPU_GET_EVENT:
/* User will have to allocate event_type
structure and pass the pointer in arg */
{
ipu_event_info info;
int r = -1;
if (copy_from_user
(&info, (ipu_event_info *) arg,
sizeof(ipu_event_info)))
return -EFAULT;
r = get_events(&info);
if (r == -1) {
if ((file->f_flags & O_NONBLOCK) &&
(irq_info[info.irq].irq_pending == 0))
return -EAGAIN;
wait_event_interruptible_timeout(irq_info[info.irq].waitq,
(irq_info[info.irq].irq_pending != 0), 2 * HZ);
r = get_events(&info);
}
ret = -1;
if (r == 0) {
if (!copy_to_user((ipu_event_info *) arg,
&info, sizeof(ipu_event_info)))
ret = 0;
}
}
break;
case IPU_ALOC_MEM:
{
ipu_mem_info info;
if (copy_from_user
(&info, (ipu_mem_info *) arg,
sizeof(ipu_mem_info)))
return -EFAULT;
info.vaddr = dma_alloc_coherent(0,
PAGE_ALIGN(info.size),
&info.paddr,
GFP_DMA | GFP_KERNEL);
if (info.vaddr == 0) {
printk(KERN_ERR "dma alloc failed!\n");
return -ENOBUFS;
}
if (copy_to_user((ipu_mem_info *) arg, &info,
sizeof(ipu_mem_info)) > 0)
return -EFAULT;
}
break;
case IPU_FREE_MEM:
{
ipu_mem_info info;
if (copy_from_user
(&info, (ipu_mem_info *) arg,
sizeof(ipu_mem_info)))
return -EFAULT;
if (info.vaddr)
dma_free_coherent(0, PAGE_ALIGN(info.size),
info.vaddr, info.paddr);
else
return -EFAULT;
}
break;
case IPU_IS_CHAN_BUSY:
{
ipu_channel_t chan;
if (copy_from_user
(&chan, (ipu_channel_t *)arg,
sizeof(ipu_channel_t)))
return -EFAULT;
if (ipu_is_channel_busy(chan))
ret = 1;
else
ret = 0;
}
break;
case IPU_CALC_STRIPES_SIZE:
{
ipu_stripe_parm stripe_parm;
if (copy_from_user (&stripe_parm, (ipu_stripe_parm *)arg,
sizeof(ipu_stripe_parm)))
return -EFAULT;
ipu_calc_stripes_sizes(stripe_parm.input_width,
stripe_parm.output_width,
stripe_parm.maximal_stripe_width,
stripe_parm.cirr,
stripe_parm.equal_stripes,
stripe_parm.input_pixelformat,
stripe_parm.output_pixelformat,
&stripe_parm.left,
&stripe_parm.right);
if (copy_to_user((ipu_stripe_parm *) arg, &stripe_parm,
sizeof(ipu_stripe_parm)) > 0)
return -EFAULT;
}
break;
case IPU_UPDATE_BUF_OFFSET:
{
ipu_buf_offset_parm offset_parm;
if (copy_from_user (&offset_parm, (ipu_buf_offset_parm *)arg,
sizeof(ipu_buf_offset_parm)))
return -EFAULT;
ret = ipu_update_channel_offset(offset_parm.channel,
offset_parm.type,
offset_parm.pixel_fmt,
offset_parm.width,
offset_parm.height,
offset_parm.stride,
offset_parm.u_offset,
offset_parm.v_offset,
offset_parm.vertical_offset,
offset_parm.horizontal_offset);
}
break;
case IPU_CSC_UPDATE:
{
int param[5][3];
ipu_csc_update csc;
if (copy_from_user(&csc, (void *) arg,
sizeof(ipu_csc_update)))
return -EFAULT;
if (copy_from_user(¶m[0][0], (void *) csc.param,
sizeof(param)))
return -EFAULT;
ipu_set_csc_coefficients(csc.channel, param);
}
break;
default:
break;
}
return ret;
}
static int mxc_ipu_mmap(struct file *file, struct vm_area_struct *vma)
{
// vma->vm_page_prot = pgprot_writethru(vma->vm_page_prot);
if (remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
vma->vm_end - vma->vm_start,
vma->vm_page_prot)) {
printk(KERN_ERR
"mmap failed!\n");
return -ENOBUFS;
}
return 0;
}
static int mxc_ipu_release(struct inode *inode, struct file *file)
{
return 0;
}
static struct file_operations mxc_ipu_fops = {
.owner = THIS_MODULE,
.open = mxc_ipu_open,
.mmap = mxc_ipu_mmap,
.release = mxc_ipu_release,
.ioctl = mxc_ipu_ioctl
};
int register_ipu_device()
{
int ret = 0;
struct device *temp;
mxc_ipu_major = register_chrdev(0, "mxc_ipu", &mxc_ipu_fops);
if (mxc_ipu_major < 0) {
printk(KERN_ERR
"Unable to register Mxc Ipu as a char device\n");
return mxc_ipu_major;
}
mxc_ipu_class = class_create(THIS_MODULE, "mxc_ipu");
if (IS_ERR(mxc_ipu_class)) {
printk(KERN_ERR "Unable to create class for Mxc Ipu\n");
ret = PTR_ERR(mxc_ipu_class);
goto err1;
}
temp = device_create(mxc_ipu_class, NULL, MKDEV(mxc_ipu_major, 0),
NULL, "mxc_ipu");
if (IS_ERR(temp)) {
printk(KERN_ERR "Unable to create class device for Mxc Ipu\n");
ret = PTR_ERR(temp);
goto err2;
}
spin_lock_init(&event_lock);
return ret;
err2:
class_destroy(mxc_ipu_class);
err1:
unregister_chrdev(mxc_ipu_major, "mxc_ipu");
return ret;
}
|