1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
|
/*
* Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/*!
* @defgroup Framebuffer Framebuffer Driver for SDC and ADC.
*/
/*!
* @file mxcfb.c
*
* @brief MXC Frame buffer driver for SDC
*
* @ingroup Framebuffer
*/
/*!
* Include files
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/sched.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/interrupt.h>
#include <linux/slab.h>
#include <linux/fb.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/dma-mapping.h>
#include <linux/clk.h>
#include <linux/console.h>
#include <linux/io.h>
#include <linux/ipu.h>
#include <linux/mxcfb.h>
#include <asm/mach-types.h>
#include <asm/uaccess.h>
#include <mach/hardware.h>
/*
* Driver name
*/
#define MXCFB_NAME "mxc_sdc_fb"
/*!
* Structure containing the MXC specific framebuffer information.
*/
struct mxcfb_info {
int blank;
ipu_channel_t ipu_ch;
int ipu_di;
u32 ipu_di_pix_fmt;
bool overlay;
bool alpha_chan_en;
dma_addr_t alpha_phy_addr0;
dma_addr_t alpha_phy_addr1;
void *alpha_virt_addr0;
void *alpha_virt_addr1;
uint32_t alpha_mem_len;
uint32_t ipu_ch_irq;
uint32_t cur_ipu_buf;
uint32_t cur_ipu_alpha_buf;
u32 pseudo_palette[16];
struct semaphore flip_sem;
struct semaphore alpha_flip_sem;
struct completion vsync_complete;
};
struct mxcfb_alloc_list {
struct list_head list;
dma_addr_t phy_addr;
void *cpu_addr;
u32 size;
};
enum {
BOTH_ON,
SRC_ON,
TGT_ON,
BOTH_OFF
};
static char *fb_mode;
static unsigned long default_bpp = 16;
static bool g_dp_in_use;
LIST_HEAD(fb_alloc_list);
static struct fb_info *mxcfb_info[3];
static uint32_t bpp_to_pixfmt(struct fb_info *fbi)
{
uint32_t pixfmt = 0;
if (fbi->var.nonstd)
return fbi->var.nonstd;
switch (fbi->var.bits_per_pixel) {
case 24:
pixfmt = IPU_PIX_FMT_BGR24;
break;
case 32:
pixfmt = IPU_PIX_FMT_BGR32;
break;
case 16:
pixfmt = IPU_PIX_FMT_RGB565;
break;
}
return pixfmt;
}
static irqreturn_t mxcfb_irq_handler(int irq, void *dev_id);
static int mxcfb_blank(int blank, struct fb_info *info);
static int mxcfb_map_video_memory(struct fb_info *fbi);
static int mxcfb_unmap_video_memory(struct fb_info *fbi);
/*
* Set fixed framebuffer parameters based on variable settings.
*
* @param info framebuffer information pointer
*/
static int mxcfb_set_fix(struct fb_info *info)
{
struct fb_fix_screeninfo *fix = &info->fix;
struct fb_var_screeninfo *var = &info->var;
fix->line_length = var->xres_virtual * var->bits_per_pixel / 8;
fix->type = FB_TYPE_PACKED_PIXELS;
fix->accel = FB_ACCEL_NONE;
fix->visual = FB_VISUAL_TRUECOLOR;
fix->xpanstep = 1;
fix->ypanstep = 1;
return 0;
}
static int _setup_disp_channel1(struct fb_info *fbi)
{
ipu_channel_params_t params;
struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par;
memset(¶ms, 0, sizeof(params));
params.mem_dp_bg_sync.di = mxc_fbi->ipu_di;
/*
* Assuming interlaced means yuv output, below setting also
* valid for mem_dc_sync. FG should have the same vmode as BG.
*/
if (mxc_fbi->ipu_ch == MEM_FG_SYNC) {
struct mxcfb_info *mxc_fbi_tmp;
int i;
for (i = 0; i < num_registered_fb; i++) {
mxc_fbi_tmp = (struct mxcfb_info *)
(registered_fb[i]->par);
if (mxc_fbi_tmp->ipu_ch == MEM_BG_SYNC) {
fbi->var.vmode =
registered_fb[i]->var.vmode;
break;
}
}
}
if (fbi->var.vmode & FB_VMODE_INTERLACED) {
params.mem_dp_bg_sync.interlaced = true;
params.mem_dp_bg_sync.out_pixel_fmt =
IPU_PIX_FMT_YUV444;
} else {
if (mxc_fbi->ipu_di_pix_fmt)
params.mem_dp_bg_sync.out_pixel_fmt = mxc_fbi->ipu_di_pix_fmt;
else
params.mem_dp_bg_sync.out_pixel_fmt = IPU_PIX_FMT_RGB666;
}
params.mem_dp_bg_sync.in_pixel_fmt = bpp_to_pixfmt(fbi);
if (mxc_fbi->alpha_chan_en)
params.mem_dp_bg_sync.alpha_chan_en = true;
ipu_init_channel(mxc_fbi->ipu_ch, ¶ms);
return 0;
}
static int _setup_disp_channel2(struct fb_info *fbi)
{
int retval = 0;
struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par;
mxc_fbi->cur_ipu_buf = 1;
sema_init(&mxc_fbi->flip_sem, 1);
if (mxc_fbi->alpha_chan_en) {
mxc_fbi->cur_ipu_alpha_buf = 1;
sema_init(&mxc_fbi->alpha_flip_sem, 1);
}
fbi->var.xoffset = fbi->var.yoffset = 0;
retval = ipu_init_channel_buffer(mxc_fbi->ipu_ch, IPU_INPUT_BUFFER,
bpp_to_pixfmt(fbi),
fbi->var.xres, fbi->var.yres,
fbi->fix.line_length,
IPU_ROTATE_NONE,
fbi->fix.smem_start +
(fbi->fix.line_length * fbi->var.yres),
fbi->fix.smem_start,
0, 0);
if (retval) {
dev_err(fbi->device,
"ipu_init_channel_buffer error %d\n", retval);
}
if (mxc_fbi->alpha_chan_en) {
retval = ipu_init_channel_buffer(mxc_fbi->ipu_ch,
IPU_ALPHA_IN_BUFFER,
IPU_PIX_FMT_GENERIC,
fbi->var.xres, fbi->var.yres,
fbi->var.xres,
IPU_ROTATE_NONE,
mxc_fbi->alpha_phy_addr0,
mxc_fbi->alpha_phy_addr1,
0, 0);
if (retval) {
dev_err(fbi->device,
"ipu_init_channel_buffer error %d\n", retval);
return retval;
}
}
return retval;
}
/*
* Set framebuffer parameters and change the operating mode.
*
* @param info framebuffer information pointer
*/
static int mxcfb_set_par(struct fb_info *fbi)
{
int retval = 0;
u32 mem_len, alpha_mem_len;
ipu_di_signal_cfg_t sig_cfg;
struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par;
dev_dbg(fbi->device, "Reconfiguring framebuffer\n");
ipu_disable_irq(mxc_fbi->ipu_ch_irq);
ipu_disable_channel(mxc_fbi->ipu_ch, true);
ipu_uninit_channel(mxc_fbi->ipu_ch);
ipu_clear_irq(mxc_fbi->ipu_ch_irq);
mxcfb_set_fix(fbi);
mem_len = fbi->var.yres_virtual * fbi->fix.line_length;
if (!fbi->fix.smem_start || (mem_len > fbi->fix.smem_len)) {
if (fbi->fix.smem_start)
mxcfb_unmap_video_memory(fbi);
if (mxcfb_map_video_memory(fbi) < 0)
return -ENOMEM;
}
if (mxc_fbi->alpha_chan_en) {
alpha_mem_len = fbi->var.xres * fbi->var.yres;
if ((!mxc_fbi->alpha_phy_addr0 && !mxc_fbi->alpha_phy_addr1) ||
(alpha_mem_len > mxc_fbi->alpha_mem_len)) {
if (mxc_fbi->alpha_phy_addr0)
dma_free_coherent(fbi->device,
mxc_fbi->alpha_mem_len,
mxc_fbi->alpha_virt_addr0,
mxc_fbi->alpha_phy_addr0);
if (mxc_fbi->alpha_phy_addr1)
dma_free_coherent(fbi->device,
mxc_fbi->alpha_mem_len,
mxc_fbi->alpha_virt_addr1,
mxc_fbi->alpha_phy_addr1);
mxc_fbi->alpha_virt_addr0 =
dma_alloc_coherent(fbi->device,
alpha_mem_len,
&mxc_fbi->alpha_phy_addr0,
GFP_DMA | GFP_KERNEL);
mxc_fbi->alpha_virt_addr1 =
dma_alloc_coherent(fbi->device,
alpha_mem_len,
&mxc_fbi->alpha_phy_addr1,
GFP_DMA | GFP_KERNEL);
if (mxc_fbi->alpha_virt_addr0 == NULL ||
mxc_fbi->alpha_virt_addr1 == NULL) {
dev_err(fbi->device, "mxcfb: dma alloc for"
" alpha buffer failed.\n");
if (mxc_fbi->alpha_virt_addr0)
dma_free_coherent(fbi->device,
mxc_fbi->alpha_mem_len,
mxc_fbi->alpha_virt_addr0,
mxc_fbi->alpha_phy_addr0);
if (mxc_fbi->alpha_virt_addr1)
dma_free_coherent(fbi->device,
mxc_fbi->alpha_mem_len,
mxc_fbi->alpha_virt_addr1,
mxc_fbi->alpha_phy_addr1);
return -ENOMEM;
}
mxc_fbi->alpha_mem_len = alpha_mem_len;
}
}
_setup_disp_channel1(fbi);
if (!mxc_fbi->overlay) {
uint32_t out_pixel_fmt;
memset(&sig_cfg, 0, sizeof(sig_cfg));
if (fbi->var.vmode & FB_VMODE_INTERLACED) {
sig_cfg.interlaced = true;
out_pixel_fmt = IPU_PIX_FMT_YUV444;
} else {
if (mxc_fbi->ipu_di_pix_fmt)
out_pixel_fmt = mxc_fbi->ipu_di_pix_fmt;
else
out_pixel_fmt = IPU_PIX_FMT_RGB666;
}
if (fbi->var.vmode & FB_VMODE_ODD_FLD_FIRST) /* PAL */
sig_cfg.odd_field_first = true;
if (fbi->var.sync & FB_SYNC_EXT)
sig_cfg.ext_clk = true;
if (fbi->var.sync & FB_SYNC_HOR_HIGH_ACT)
sig_cfg.Hsync_pol = true;
if (fbi->var.sync & FB_SYNC_VERT_HIGH_ACT)
sig_cfg.Vsync_pol = true;
if (!(fbi->var.sync & FB_SYNC_CLK_LAT_FALL))
sig_cfg.clk_pol = true;
if (fbi->var.sync & FB_SYNC_DATA_INVERT)
sig_cfg.data_pol = true;
if (!(fbi->var.sync & FB_SYNC_OE_LOW_ACT))
sig_cfg.enable_pol = true;
if (fbi->var.sync & FB_SYNC_CLK_IDLE_EN)
sig_cfg.clkidle_en = true;
dev_dbg(fbi->device, "pixclock = %ul Hz\n",
(u32) (PICOS2KHZ(fbi->var.pixclock) * 1000UL));
if (ipu_init_sync_panel(mxc_fbi->ipu_di,
(PICOS2KHZ(fbi->var.pixclock)) * 1000UL,
fbi->var.xres, fbi->var.yres,
out_pixel_fmt,
fbi->var.left_margin,
fbi->var.hsync_len,
fbi->var.right_margin,
fbi->var.upper_margin,
fbi->var.vsync_len,
fbi->var.lower_margin,
0, sig_cfg) != 0) {
dev_err(fbi->device,
"mxcfb: Error initializing panel.\n");
return -EINVAL;
}
fbi->mode =
(struct fb_videomode *)fb_match_mode(&fbi->var,
&fbi->modelist);
ipu_disp_set_window_pos(mxc_fbi->ipu_ch, 0, 0);
}
retval = _setup_disp_channel2(fbi);
if (retval)
return retval;
if (mxc_fbi->blank == FB_BLANK_UNBLANK) {
ipu_enable_channel(mxc_fbi->ipu_ch);
}
return retval;
}
static int _swap_channels(struct fb_info *fbi,
struct fb_info *fbi_to, bool both_on)
{
int retval, tmp;
ipu_channel_t old_ch;
struct mxcfb_info *mxc_fbi_from = (struct mxcfb_info *)fbi->par;
struct mxcfb_info *mxc_fbi_to = (struct mxcfb_info *)fbi_to->par;
if (both_on) {
ipu_disable_channel(mxc_fbi_to->ipu_ch, true);
ipu_uninit_channel(mxc_fbi_to->ipu_ch);
}
/* switch the mxc fbi parameters */
old_ch = mxc_fbi_from->ipu_ch;
mxc_fbi_from->ipu_ch = mxc_fbi_to->ipu_ch;
mxc_fbi_to->ipu_ch = old_ch;
tmp = mxc_fbi_from->ipu_ch_irq;
mxc_fbi_from->ipu_ch_irq = mxc_fbi_to->ipu_ch_irq;
mxc_fbi_to->ipu_ch_irq = tmp;
_setup_disp_channel1(fbi);
retval = _setup_disp_channel2(fbi);
if (retval)
return retval;
/* switch between dp and dc, disable old idmac, enable new idmac */
retval = ipu_swap_channel(old_ch, mxc_fbi_from->ipu_ch);
ipu_uninit_channel(old_ch);
if (both_on) {
_setup_disp_channel1(fbi_to);
retval = _setup_disp_channel2(fbi_to);
if (retval)
return retval;
ipu_enable_channel(mxc_fbi_to->ipu_ch);
}
return retval;
}
static int swap_channels(struct fb_info *fbi)
{
int i;
int swap_mode;
ipu_channel_t ch_to;
struct mxcfb_info *mxc_fbi_from = (struct mxcfb_info *)fbi->par;
struct fb_info *fbi_to = NULL;
struct mxcfb_info *mxc_fbi_to;
/* what's the target channel? */
if (mxc_fbi_from->ipu_ch == MEM_BG_SYNC)
ch_to = MEM_DC_SYNC;
else
ch_to = MEM_BG_SYNC;
for (i = 0; i < num_registered_fb; i++) {
mxc_fbi_to =
(struct mxcfb_info *)mxcfb_info[i]->par;
if (mxc_fbi_to->ipu_ch == ch_to) {
fbi_to = mxcfb_info[i];
break;
}
}
if (fbi_to == NULL)
return -1;
if (mxc_fbi_from->blank == FB_BLANK_UNBLANK) {
if (mxc_fbi_to->blank == FB_BLANK_UNBLANK)
swap_mode = BOTH_ON;
else
swap_mode = SRC_ON;
} else {
if (mxc_fbi_to->blank == FB_BLANK_UNBLANK)
swap_mode = TGT_ON;
else
swap_mode = BOTH_OFF;
}
/* tvout di-1: for DC use UYVY, for DP use RGB */
if (mxc_fbi_from->ipu_di == 1 && ch_to == MEM_DC_SYNC) {
fbi->var.bits_per_pixel = 16;
fbi->var.nonstd = IPU_PIX_FMT_UYVY;
} else if (mxc_fbi_from->ipu_di == 1 && ch_to == MEM_BG_SYNC) {
fbi->var.nonstd = 0;
} else if (mxc_fbi_from->ipu_di == 0 && ch_to == MEM_DC_SYNC) {
fbi_to->var.nonstd = 0;
} else if (mxc_fbi_from->ipu_di == 0 && ch_to == MEM_BG_SYNC) {
fbi->var.bits_per_pixel = 16;
fbi->var.nonstd = IPU_PIX_FMT_UYVY;
}
switch (swap_mode) {
case BOTH_ON:
/* disable target->switch src->enable target */
_swap_channels(fbi, fbi_to, true);
break;
case SRC_ON:
/* just switch src */
_swap_channels(fbi, fbi_to, false);
break;
case TGT_ON:
/* just switch target */
_swap_channels(fbi_to, fbi, false);
break;
case BOTH_OFF:
/* switch directly, no more need to do */
mxc_fbi_to->ipu_ch = mxc_fbi_from->ipu_ch;
mxc_fbi_from->ipu_ch = ch_to;
i = mxc_fbi_from->ipu_ch_irq;
mxc_fbi_from->ipu_ch_irq = mxc_fbi_to->ipu_ch_irq;
mxc_fbi_to->ipu_ch_irq = i;
break;
default:
break;
}
return 0;
}
/*
* Check framebuffer variable parameters and adjust to valid values.
*
* @param var framebuffer variable parameters
*
* @param info framebuffer information pointer
*/
static int mxcfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
{
u32 vtotal;
u32 htotal;
if (var->xres_virtual < var->xres)
var->xres_virtual = var->xres;
if (var->yres_virtual < var->yres)
var->yres_virtual = var->yres;
if ((var->bits_per_pixel != 32) && (var->bits_per_pixel != 24) &&
(var->bits_per_pixel != 16) && (var->bits_per_pixel != 8))
var->bits_per_pixel = default_bpp;
switch (var->bits_per_pixel) {
case 8:
var->red.length = 3;
var->red.offset = 5;
var->red.msb_right = 0;
var->green.length = 3;
var->green.offset = 2;
var->green.msb_right = 0;
var->blue.length = 2;
var->blue.offset = 0;
var->blue.msb_right = 0;
var->transp.length = 0;
var->transp.offset = 0;
var->transp.msb_right = 0;
break;
case 16:
var->red.length = 5;
var->red.offset = 11;
var->red.msb_right = 0;
var->green.length = 6;
var->green.offset = 5;
var->green.msb_right = 0;
var->blue.length = 5;
var->blue.offset = 0;
var->blue.msb_right = 0;
var->transp.length = 0;
var->transp.offset = 0;
var->transp.msb_right = 0;
break;
case 24:
var->red.length = 8;
var->red.offset = 16;
var->red.msb_right = 0;
var->green.length = 8;
var->green.offset = 8;
var->green.msb_right = 0;
var->blue.length = 8;
var->blue.offset = 0;
var->blue.msb_right = 0;
var->transp.length = 0;
var->transp.offset = 0;
var->transp.msb_right = 0;
break;
case 32:
var->red.length = 8;
var->red.offset = 16;
var->red.msb_right = 0;
var->green.length = 8;
var->green.offset = 8;
var->green.msb_right = 0;
var->blue.length = 8;
var->blue.offset = 0;
var->blue.msb_right = 0;
var->transp.length = 8;
var->transp.offset = 24;
var->transp.msb_right = 0;
break;
}
if (var->pixclock < 1000) {
htotal = var->xres + var->right_margin + var->hsync_len +
var->left_margin;
vtotal = var->yres + var->lower_margin + var->vsync_len +
var->upper_margin;
var->pixclock = (vtotal * htotal * 6UL) / 100UL;
var->pixclock = KHZ2PICOS(var->pixclock);
dev_dbg(info->device,
"pixclock set for 60Hz refresh = %u ps\n",
var->pixclock);
}
var->height = -1;
var->width = -1;
var->grayscale = 0;
return 0;
}
static inline u_int _chan_to_field(u_int chan, struct fb_bitfield *bf)
{
chan &= 0xffff;
chan >>= 16 - bf->length;
return chan << bf->offset;
}
static int mxcfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
u_int trans, struct fb_info *fbi)
{
unsigned int val;
int ret = 1;
/*
* If greyscale is true, then we convert the RGB value
* to greyscale no matter what visual we are using.
*/
if (fbi->var.grayscale)
red = green = blue = (19595 * red + 38470 * green +
7471 * blue) >> 16;
switch (fbi->fix.visual) {
case FB_VISUAL_TRUECOLOR:
/*
* 16-bit True Colour. We encode the RGB value
* according to the RGB bitfield information.
*/
if (regno < 16) {
u32 *pal = fbi->pseudo_palette;
val = _chan_to_field(red, &fbi->var.red);
val |= _chan_to_field(green, &fbi->var.green);
val |= _chan_to_field(blue, &fbi->var.blue);
pal[regno] = val;
ret = 0;
}
break;
case FB_VISUAL_STATIC_PSEUDOCOLOR:
case FB_VISUAL_PSEUDOCOLOR:
break;
}
return ret;
}
/*
* Function to handle custom ioctls for MXC framebuffer.
*
* @param inode inode struct
*
* @param file file struct
*
* @param cmd Ioctl command to handle
*
* @param arg User pointer to command arguments
*
* @param fbi framebuffer information pointer
*/
static int mxcfb_ioctl(struct fb_info *fbi, unsigned int cmd, unsigned long arg)
{
int retval = 0;
int __user *argp = (void __user *)arg;
struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par;
switch (cmd) {
case MXCFB_SET_GBL_ALPHA:
{
struct mxcfb_gbl_alpha ga;
if (copy_from_user(&ga, (void *)arg, sizeof(ga))) {
retval = -EFAULT;
break;
}
if (ipu_disp_set_global_alpha(mxc_fbi->ipu_ch,
(bool)ga.enable,
ga.alpha)) {
retval = -EINVAL;
break;
}
if (ga.enable)
mxc_fbi->alpha_chan_en = false;
if (ga.enable)
dev_dbg(fbi->device,
"Set global alpha of %s to %d\n",
fbi->fix.id, ga.alpha);
break;
}
case MXCFB_SET_LOC_ALPHA:
{
struct mxcfb_loc_alpha la;
int i;
char *video_plane_idstr = "";
if (copy_from_user(&la, (void *)arg, sizeof(la))) {
retval = -EFAULT;
break;
}
if (ipu_disp_set_global_alpha(mxc_fbi->ipu_ch,
!(bool)la.enable, 0)) {
retval = -EINVAL;
break;
}
if (la.enable) {
mxc_fbi->alpha_chan_en = true;
if (mxc_fbi->ipu_ch == MEM_FG_SYNC)
video_plane_idstr = "DISP3 BG";
else if (mxc_fbi->ipu_ch == MEM_BG_SYNC)
video_plane_idstr = "DISP3 FG";
for (i = 0; i < num_registered_fb; i++) {
char *idstr = registered_fb[i]->fix.id;
if (strcmp(idstr, video_plane_idstr) == 0) {
((struct mxcfb_info *)(registered_fb[i]->par))->alpha_chan_en = false;
break;
}
}
} else
mxc_fbi->alpha_chan_en = false;
mxcfb_set_par(fbi);
la.alpha_phy_addr0 = mxc_fbi->alpha_phy_addr0;
la.alpha_phy_addr1 = mxc_fbi->alpha_phy_addr1;
if (copy_to_user((void *)arg, &la, sizeof(la))) {
retval = -EFAULT;
break;
}
if (la.enable)
dev_dbg(fbi->device,
"Enable DP local alpha for %s\n",
fbi->fix.id);
break;
}
case MXCFB_SET_LOC_ALP_BUF:
{
unsigned long base;
uint32_t ipu_alp_ch_irq;
if (!(((mxc_fbi->ipu_ch == MEM_FG_SYNC) ||
(mxc_fbi->ipu_ch == MEM_BG_SYNC)) &&
(mxc_fbi->alpha_chan_en))) {
dev_err(fbi->device,
"Should use background or overlay "
"framebuffer to set the alpha buffer "
"number\n");
return -EINVAL;
}
if (get_user(base, argp))
return -EFAULT;
if (base != mxc_fbi->alpha_phy_addr0 &&
base != mxc_fbi->alpha_phy_addr1) {
dev_err(fbi->device,
"Wrong alpha buffer physical address "
"%lu\n", base);
return -EINVAL;
}
if (mxc_fbi->ipu_ch == MEM_FG_SYNC)
ipu_alp_ch_irq = IPU_IRQ_FG_ALPHA_SYNC_EOF;
else
ipu_alp_ch_irq = IPU_IRQ_BG_ALPHA_SYNC_EOF;
down(&mxc_fbi->alpha_flip_sem);
mxc_fbi->cur_ipu_alpha_buf =
!mxc_fbi->cur_ipu_alpha_buf;
if (ipu_update_channel_buffer(mxc_fbi->ipu_ch,
IPU_ALPHA_IN_BUFFER,
mxc_fbi->
cur_ipu_alpha_buf,
base) == 0) {
ipu_select_buffer(mxc_fbi->ipu_ch,
IPU_ALPHA_IN_BUFFER,
mxc_fbi->cur_ipu_alpha_buf);
ipu_clear_irq(ipu_alp_ch_irq);
ipu_enable_irq(ipu_alp_ch_irq);
} else {
dev_err(fbi->device,
"Error updating %s SDC alpha buf %d "
"to address=0x%08lX\n",
fbi->fix.id,
mxc_fbi->cur_ipu_alpha_buf, base);
}
break;
}
case MXCFB_SET_CLR_KEY:
{
struct mxcfb_color_key key;
if (copy_from_user(&key, (void *)arg, sizeof(key))) {
retval = -EFAULT;
break;
}
retval = ipu_disp_set_color_key(mxc_fbi->ipu_ch,
key.enable,
key.color_key);
dev_dbg(fbi->device, "Set color key to 0x%08X\n",
key.color_key);
break;
}
case MXCFB_WAIT_FOR_VSYNC:
{
if (mxc_fbi->blank != FB_BLANK_UNBLANK)
break;
down(&mxc_fbi->flip_sem);
init_completion(&mxc_fbi->vsync_complete);
ipu_clear_irq(mxc_fbi->ipu_ch_irq);
ipu_enable_irq(mxc_fbi->ipu_ch_irq);
retval = wait_for_completion_interruptible_timeout(
&mxc_fbi->vsync_complete, 1 * HZ);
if (retval == 0) {
dev_err(fbi->device,
"MXCFB_WAIT_FOR_VSYNC: timeout %d\n",
retval);
retval = -ETIME;
} else if (retval > 0) {
retval = 0;
}
break;
}
case FBIO_ALLOC:
{
int size;
struct mxcfb_alloc_list *mem;
mem = kzalloc(sizeof(*mem), GFP_KERNEL);
if (mem == NULL)
return -ENOMEM;
if (get_user(size, argp))
return -EFAULT;
mem->size = PAGE_ALIGN(size);
mem->cpu_addr = dma_alloc_coherent(fbi->device, size,
&mem->phy_addr,
GFP_DMA);
if (mem->cpu_addr == NULL) {
kfree(mem);
return -ENOMEM;
}
list_add(&mem->list, &fb_alloc_list);
dev_dbg(fbi->device, "allocated %d bytes @ 0x%08X\n",
mem->size, mem->phy_addr);
if (put_user(mem->phy_addr, argp))
return -EFAULT;
break;
}
case FBIO_FREE:
{
unsigned long offset;
struct mxcfb_alloc_list *mem;
if (get_user(offset, argp))
return -EFAULT;
retval = -EINVAL;
list_for_each_entry(mem, &fb_alloc_list, list) {
if (mem->phy_addr == offset) {
list_del(&mem->list);
dma_free_coherent(fbi->device,
mem->size,
mem->cpu_addr,
mem->phy_addr);
kfree(mem);
retval = 0;
break;
}
}
break;
}
case MXCFB_SET_OVERLAY_POS:
{
struct mxcfb_pos pos;
struct fb_info *bg_fbi = NULL;
struct mxcfb_info *bg_mxcfbi = NULL;
int i;
if (mxc_fbi->ipu_ch != MEM_FG_SYNC) {
dev_err(fbi->device, "Should use the overlay "
"framebuffer to set the position of "
"the overlay window\n");
retval = -EINVAL;
break;
}
if (copy_from_user(&pos, (void *)arg, sizeof(pos))) {
retval = -EFAULT;
break;
}
for (i = 0; i < num_registered_fb; i++) {
bg_mxcfbi =
((struct mxcfb_info *)(registered_fb[i]->par));
if (bg_mxcfbi->ipu_ch == MEM_BG_SYNC) {
bg_fbi = registered_fb[i];
break;
}
}
if (bg_fbi == NULL) {
dev_err(fbi->device, "Cannot find the "
"background framebuffer\n");
retval = -ENOENT;
break;
}
if (fbi->var.xres + pos.x > bg_fbi->var.xres) {
if (bg_fbi->var.xres < fbi->var.xres)
pos.x = 0;
else
pos.x = bg_fbi->var.xres - fbi->var.xres;
}
if (fbi->var.yres + pos.y > bg_fbi->var.yres) {
if (bg_fbi->var.yres < fbi->var.yres)
pos.y = 0;
else
pos.y = bg_fbi->var.yres - fbi->var.yres;
}
retval = ipu_disp_set_window_pos(mxc_fbi->ipu_ch,
pos.x, pos.y);
if (copy_to_user((void *)arg, &pos, sizeof(pos))) {
retval = -EFAULT;
break;
}
break;
}
case MXCFB_GET_FB_IPU_CHAN:
{
struct mxcfb_info *mxc_fbi =
(struct mxcfb_info *)fbi->par;
if (put_user(mxc_fbi->ipu_ch, argp))
return -EFAULT;
break;
}
default:
retval = -EINVAL;
}
return retval;
}
/*
* mxcfb_blank():
* Blank the display.
*/
static int mxcfb_blank(int blank, struct fb_info *info)
{
struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)info->par;
dev_dbg(info->device, "blank = %d\n", blank);
if (mxc_fbi->blank == blank)
return 0;
mxc_fbi->blank = blank;
switch (blank) {
case FB_BLANK_POWERDOWN:
case FB_BLANK_VSYNC_SUSPEND:
case FB_BLANK_HSYNC_SUSPEND:
case FB_BLANK_NORMAL:
ipu_disable_channel(mxc_fbi->ipu_ch, true);
ipu_uninit_channel(mxc_fbi->ipu_ch);
break;
case FB_BLANK_UNBLANK:
mxcfb_set_par(info);
break;
}
return 0;
}
/*
* Pan or Wrap the Display
*
* This call looks only at xoffset, yoffset and the FB_VMODE_YWRAP flag
*
* @param var Variable screen buffer information
* @param info Framebuffer information pointer
*/
static int
mxcfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
{
struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)info->par;
u_int y_bottom;
unsigned long base;
if (var->xoffset > 0) {
dev_dbg(info->device, "x panning not supported\n");
return -EINVAL;
}
if ((info->var.xoffset == var->xoffset) &&
(info->var.yoffset == var->yoffset))
return 0; /* No change, do nothing */
y_bottom = var->yoffset;
if (!(var->vmode & FB_VMODE_YWRAP))
y_bottom += var->yres;
if (y_bottom > info->var.yres_virtual)
return -EINVAL;
base = (var->yoffset * var->xres_virtual + var->xoffset);
base *= (var->bits_per_pixel) / 8;
base += info->fix.smem_start;
dev_dbg(info->device, "Updating SDC BG buf %d address=0x%08lX\n",
mxc_fbi->cur_ipu_buf, base);
down(&mxc_fbi->flip_sem);
init_completion(&mxc_fbi->vsync_complete);
mxc_fbi->cur_ipu_buf = !mxc_fbi->cur_ipu_buf;
if (ipu_update_channel_buffer(mxc_fbi->ipu_ch, IPU_INPUT_BUFFER,
mxc_fbi->cur_ipu_buf, base) == 0) {
ipu_select_buffer(mxc_fbi->ipu_ch, IPU_INPUT_BUFFER,
mxc_fbi->cur_ipu_buf);
ipu_clear_irq(mxc_fbi->ipu_ch_irq);
ipu_enable_irq(mxc_fbi->ipu_ch_irq);
} else {
dev_err(info->device,
"Error updating SDC buf %d to address=0x%08lX\n",
mxc_fbi->cur_ipu_buf, base);
}
dev_dbg(info->device, "Update complete\n");
info->var.xoffset = var->xoffset;
info->var.yoffset = var->yoffset;
if (var->vmode & FB_VMODE_YWRAP)
info->var.vmode |= FB_VMODE_YWRAP;
else
info->var.vmode &= ~FB_VMODE_YWRAP;
return 0;
}
/*
* Function to handle custom mmap for MXC framebuffer.
*
* @param fbi framebuffer information pointer
*
* @param vma Pointer to vm_area_struct
*/
static int mxcfb_mmap(struct fb_info *fbi, struct vm_area_struct *vma)
{
bool found = false;
u32 len;
unsigned long offset = vma->vm_pgoff << PAGE_SHIFT;
struct mxcfb_alloc_list *mem;
struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par;
if (offset < fbi->fix.smem_len) {
/* mapping framebuffer memory */
len = fbi->fix.smem_len - offset;
vma->vm_pgoff = (fbi->fix.smem_start + offset) >> PAGE_SHIFT;
} else if ((vma->vm_pgoff ==
(mxc_fbi->alpha_phy_addr0 >> PAGE_SHIFT)) ||
(vma->vm_pgoff ==
(mxc_fbi->alpha_phy_addr1 >> PAGE_SHIFT))) {
len = mxc_fbi->alpha_mem_len;
} else {
list_for_each_entry(mem, &fb_alloc_list, list) {
if (offset == mem->phy_addr) {
found = true;
len = mem->size;
break;
}
}
if (!found)
return -EINVAL;
}
len = PAGE_ALIGN(len);
if (vma->vm_end - vma->vm_start > len)
return -EINVAL;
/* make buffers bufferable */
vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
vma->vm_flags |= VM_IO | VM_RESERVED;
if (remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
vma->vm_end - vma->vm_start, vma->vm_page_prot)) {
dev_dbg(fbi->device, "mmap remap_pfn_range failed\n");
return -ENOBUFS;
}
return 0;
}
/*!
* This structure contains the pointers to the control functions that are
* invoked by the core framebuffer driver to perform operations like
* blitting, rectangle filling, copy regions and cursor definition.
*/
static struct fb_ops mxcfb_ops = {
.owner = THIS_MODULE,
.fb_set_par = mxcfb_set_par,
.fb_check_var = mxcfb_check_var,
.fb_setcolreg = mxcfb_setcolreg,
.fb_pan_display = mxcfb_pan_display,
.fb_ioctl = mxcfb_ioctl,
.fb_mmap = mxcfb_mmap,
.fb_fillrect = cfb_fillrect,
.fb_copyarea = cfb_copyarea,
.fb_imageblit = cfb_imageblit,
.fb_blank = mxcfb_blank,
};
static irqreturn_t mxcfb_irq_handler(int irq, void *dev_id)
{
struct fb_info *fbi = dev_id;
struct mxcfb_info *mxc_fbi = fbi->par;
complete(&mxc_fbi->vsync_complete);
up(&mxc_fbi->flip_sem);
ipu_disable_irq(irq);
return IRQ_HANDLED;
}
static irqreturn_t mxcfb_alpha_irq_handler(int irq, void *dev_id)
{
struct fb_info *fbi = dev_id;
struct mxcfb_info *mxc_fbi = fbi->par;
up(&mxc_fbi->alpha_flip_sem);
ipu_disable_irq(irq);
return IRQ_HANDLED;
}
/*
* Suspends the framebuffer and blanks the screen. Power management support
*/
static int mxcfb_suspend(struct platform_device *pdev, pm_message_t state)
{
struct fb_info *fbi = platform_get_drvdata(pdev);
struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par;
int saved_blank;
#ifdef CONFIG_FB_MXC_LOW_PWR_DISPLAY
void *fbmem;
#endif
acquire_console_sem();
fb_set_suspend(fbi, 1);
saved_blank = mxc_fbi->blank;
mxcfb_blank(FB_BLANK_POWERDOWN, fbi);
mxc_fbi->blank = saved_blank;
release_console_sem();
return 0;
}
/*
* Resumes the framebuffer and unblanks the screen. Power management support
*/
static int mxcfb_resume(struct platform_device *pdev)
{
struct fb_info *fbi = platform_get_drvdata(pdev);
struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par;
int saved_blank;
acquire_console_sem();
saved_blank = mxc_fbi->blank;
mxc_fbi->blank = FB_BLANK_POWERDOWN;
mxcfb_blank(saved_blank, fbi);
fb_set_suspend(fbi, 0);
release_console_sem();
return 0;
}
/*
* Main framebuffer functions
*/
/*!
* Allocates the DRAM memory for the frame buffer. This buffer is remapped
* into a non-cached, non-buffered, memory region to allow palette and pixel
* writes to occur without flushing the cache. Once this area is remapped,
* all virtual memory access to the video memory should occur at the new region.
*
* @param fbi framebuffer information pointer
*
* @return Error code indicating success or failure
*/
static int mxcfb_map_video_memory(struct fb_info *fbi)
{
if (fbi->fix.smem_len < fbi->var.yres_virtual * fbi->fix.line_length)
fbi->fix.smem_len = fbi->var.yres_virtual *
fbi->fix.line_length;
fbi->screen_base = dma_alloc_writecombine(fbi->device,
fbi->fix.smem_len,
(dma_addr_t *)&fbi->fix.smem_start,
GFP_DMA);
if (fbi->screen_base == 0) {
dev_err(fbi->device, "Unable to allocate framebuffer memory\n");
fbi->fix.smem_len = 0;
fbi->fix.smem_start = 0;
return -EBUSY;
}
dev_dbg(fbi->device, "allocated fb @ paddr=0x%08X, size=%d.\n",
(uint32_t) fbi->fix.smem_start, fbi->fix.smem_len);
fbi->screen_size = fbi->fix.smem_len;
/* Clear the screen */
memset((char *)fbi->screen_base, 0, fbi->fix.smem_len);
return 0;
}
/*!
* De-allocates the DRAM memory for the frame buffer.
*
* @param fbi framebuffer information pointer
*
* @return Error code indicating success or failure
*/
static int mxcfb_unmap_video_memory(struct fb_info *fbi)
{
dma_free_writecombine(fbi->device, fbi->fix.smem_len,
fbi->screen_base, fbi->fix.smem_start);
fbi->screen_base = 0;
fbi->fix.smem_start = 0;
fbi->fix.smem_len = 0;
return 0;
}
/*!
* Initializes the framebuffer information pointer. After allocating
* sufficient memory for the framebuffer structure, the fields are
* filled with custom information passed in from the configurable
* structures. This includes information such as bits per pixel,
* color maps, screen width/height and RGBA offsets.
*
* @return Framebuffer structure initialized with our information
*/
static struct fb_info *mxcfb_init_fbinfo(struct device *dev, struct fb_ops *ops)
{
struct fb_info *fbi;
struct mxcfb_info *mxcfbi;
/*
* Allocate sufficient memory for the fb structure
*/
fbi = framebuffer_alloc(sizeof(struct mxcfb_info), dev);
if (!fbi)
return NULL;
mxcfbi = (struct mxcfb_info *)fbi->par;
fbi->var.activate = FB_ACTIVATE_NOW;
fbi->fbops = ops;
fbi->flags = FBINFO_FLAG_DEFAULT;
fbi->pseudo_palette = mxcfbi->pseudo_palette;
/*
* Allocate colormap
*/
fb_alloc_cmap(&fbi->cmap, 16, 0);
return fbi;
}
static ssize_t show_disp_chan(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct fb_info *info = dev_get_drvdata(dev);
struct mxcfb_info *mxcfbi = (struct mxcfb_info *)info->par;
if (mxcfbi->ipu_ch == MEM_BG_SYNC)
return sprintf(buf, "2-layer-fb-bg\n");
else if (mxcfbi->ipu_ch == MEM_FG_SYNC)
return sprintf(buf, "2-layer-fb-fg\n");
else if (mxcfbi->ipu_ch == MEM_DC_SYNC)
return sprintf(buf, "1-layer-fb\n");
else
return sprintf(buf, "err: no display chan\n");
}
static ssize_t swap_disp_chan(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct fb_info *info = dev_get_drvdata(dev);
struct mxcfb_info *mxcfbi = (struct mxcfb_info *)info->par;
struct mxcfb_info *fg_mxcfbi = NULL;
/* swap only happen between DP-BG and DC, while DP-FG disable */
if (((mxcfbi->ipu_ch == MEM_BG_SYNC) &&
(strstr(buf, "1-layer-fb") != NULL)) ||
((mxcfbi->ipu_ch == MEM_DC_SYNC) &&
(strstr(buf, "2-layer-fb-bg") != NULL))) {
int i;
for (i = 0; i < num_registered_fb; i++) {
fg_mxcfbi =
(struct mxcfb_info *)mxcfb_info[i]->par;
if (fg_mxcfbi->ipu_ch == MEM_FG_SYNC)
break;
else
fg_mxcfbi = NULL;
}
if (!fg_mxcfbi ||
fg_mxcfbi->blank == FB_BLANK_UNBLANK) {
dev_err(dev,
"Can not switch while fb2(fb-fg) is on.\n");
return count;
}
if (swap_channels(info) < 0)
dev_err(dev, "Swap display channel failed.\n");
}
return count;
}
DEVICE_ATTR(fsl_disp_property, 644, show_disp_chan, swap_disp_chan);
/*!
* Probe routine for the framebuffer driver. It is called during the
* driver binding process. The following functions are performed in
* this routine: Framebuffer initialization, Memory allocation and
* mapping, Framebuffer registration, IPU initialization.
*
* @return Appropriate error code to the kernel common code
*/
static int mxcfb_probe(struct platform_device *pdev)
{
struct fb_info *fbi;
struct mxcfb_info *mxcfbi;
struct mxc_fb_platform_data *plat_data = pdev->dev.platform_data;
struct resource *res;
int ret = 0;
/*
* Initialize FB structures
*/
fbi = mxcfb_init_fbinfo(&pdev->dev, &mxcfb_ops);
if (!fbi) {
ret = -ENOMEM;
goto err0;
}
mxcfbi = (struct mxcfb_info *)fbi->par;
if (!g_dp_in_use) {
mxcfbi->ipu_ch_irq = IPU_IRQ_BG_SYNC_EOF;
mxcfbi->ipu_ch = MEM_BG_SYNC;
mxcfbi->blank = FB_BLANK_UNBLANK;
} else {
mxcfbi->ipu_ch_irq = IPU_IRQ_DC_SYNC_EOF;
mxcfbi->ipu_ch = MEM_DC_SYNC;
mxcfbi->blank = FB_BLANK_POWERDOWN;
}
mxcfbi->ipu_di = pdev->id;
if (pdev->id == 0) {
ipu_disp_set_global_alpha(mxcfbi->ipu_ch, true, 0x80);
ipu_disp_set_color_key(mxcfbi->ipu_ch, false, 0);
strcpy(fbi->fix.id, "DISP3 BG");
if (!g_dp_in_use)
if (ipu_request_irq(IPU_IRQ_BG_ALPHA_SYNC_EOF,
mxcfb_alpha_irq_handler, 0,
MXCFB_NAME, fbi) != 0) {
dev_err(&pdev->dev, "Error registering BG "
"alpha irq handler.\n");
ret = -EBUSY;
goto err1;
}
g_dp_in_use = true;
} else if (pdev->id == 1) {
strcpy(fbi->fix.id, "DISP3 BG - DI1");
if (!g_dp_in_use)
if (ipu_request_irq(IPU_IRQ_BG_ALPHA_SYNC_EOF,
mxcfb_alpha_irq_handler, 0,
MXCFB_NAME, fbi) != 0) {
dev_err(&pdev->dev, "Error registering BG "
"alpha irq handler.\n");
ret = -EBUSY;
goto err1;
}
g_dp_in_use = true;
} else if (pdev->id == 2) { /* Overlay */
mxcfbi->ipu_ch_irq = IPU_IRQ_FG_SYNC_EOF;
mxcfbi->ipu_ch = MEM_FG_SYNC;
mxcfbi->ipu_di = -1;
mxcfbi->overlay = true;
mxcfbi->blank = FB_BLANK_POWERDOWN;
strcpy(fbi->fix.id, "DISP3 FG");
if (ipu_request_irq(IPU_IRQ_FG_ALPHA_SYNC_EOF,
mxcfb_alpha_irq_handler, 0,
MXCFB_NAME, fbi) != 0) {
dev_err(&pdev->dev, "Error registering FG alpha irq "
"handler.\n");
ret = -EBUSY;
goto err1;
}
}
mxcfb_info[pdev->id] = fbi;
if (ipu_request_irq(mxcfbi->ipu_ch_irq, mxcfb_irq_handler, 0,
MXCFB_NAME, fbi) != 0) {
dev_err(&pdev->dev, "Error registering BG irq handler.\n");
ret = -EBUSY;
goto err1;
}
ipu_disable_irq(mxcfbi->ipu_ch_irq);
/* Default Y virtual size is 2x panel size */
fbi->var.yres_virtual = fbi->var.yres * 2;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (res) {
fbi->fix.smem_len = res->end - res->start + 1;
fbi->fix.smem_start = res->start;
fbi->screen_base = ioremap(fbi->fix.smem_start, fbi->fix.smem_len);
}
/* Need dummy values until real panel is configured */
fbi->var.xres = 240;
fbi->var.yres = 320;
if (!fb_mode && plat_data && plat_data->mode_str)
fb_find_mode(&fbi->var, fbi, plat_data->mode_str, NULL, 0, NULL,
default_bpp);
if (fb_mode)
fb_find_mode(&fbi->var, fbi, fb_mode, NULL, 0, NULL,
default_bpp);
if (plat_data) {
mxcfbi->ipu_di_pix_fmt = plat_data->interface_pix_fmt;
if (!fb_mode && plat_data->mode)
fb_videomode_to_var(&fbi->var, plat_data->mode);
}
mxcfb_check_var(&fbi->var, fbi);
mxcfb_set_fix(fbi);
ret = register_framebuffer(fbi);
if (ret < 0)
goto err2;
platform_set_drvdata(pdev, fbi);
ret = device_create_file(fbi->dev, &dev_attr_fsl_disp_property);
if (ret)
dev_err(&pdev->dev, "Error %d on creating file\n", ret);
return 0;
err2:
ipu_free_irq(mxcfbi->ipu_ch_irq, fbi);
err1:
fb_dealloc_cmap(&fbi->cmap);
framebuffer_release(fbi);
err0:
return ret;
}
static int mxcfb_remove(struct platform_device *pdev)
{
struct fb_info *fbi = platform_get_drvdata(pdev);
struct mxcfb_info *mxc_fbi = fbi->par;
if (!fbi)
return 0;
mxcfb_blank(FB_BLANK_POWERDOWN, fbi);
ipu_free_irq(mxc_fbi->ipu_ch_irq, fbi);
mxcfb_unmap_video_memory(fbi);
if (&fbi->cmap)
fb_dealloc_cmap(&fbi->cmap);
unregister_framebuffer(fbi);
framebuffer_release(fbi);
return 0;
}
/*!
* This structure contains pointers to the power management callback functions.
*/
static struct platform_driver mxcfb_driver = {
.driver = {
.name = MXCFB_NAME,
},
.probe = mxcfb_probe,
.remove = mxcfb_remove,
.suspend = mxcfb_suspend,
.resume = mxcfb_resume,
};
/*
* Parse user specified options (`video=trident:')
* example:
* video=trident:800x600,bpp=16,noaccel
*/
int mxcfb_setup(char *options)
{
char *opt;
if (!options || !*options)
return 0;
while ((opt = strsep(&options, ",")) != NULL) {
if (!*opt)
continue;
if (!strncmp(opt, "bpp=", 4))
default_bpp = simple_strtoul(opt + 4, NULL, 0);
else
fb_mode = opt;
}
return 0;
}
/*!
* Main entry function for the framebuffer. The function registers the power
* management callback functions with the kernel and also registers the MXCFB
* callback functions with the core Linux framebuffer driver \b fbmem.c
*
* @return Error code indicating success or failure
*/
int __init mxcfb_init(void)
{
int ret = 0;
#ifndef MODULE
char *option = NULL;
#endif
#ifndef MODULE
if (fb_get_options("mxcfb", &option))
return -ENODEV;
mxcfb_setup(option);
#endif
ret = platform_driver_register(&mxcfb_driver);
return ret;
}
void mxcfb_exit(void)
{
platform_driver_unregister(&mxcfb_driver);
}
module_init(mxcfb_init);
module_exit(mxcfb_exit);
MODULE_AUTHOR("Freescale Semiconductor, Inc.");
MODULE_DESCRIPTION("MXC framebuffer driver");
MODULE_LICENSE("GPL");
MODULE_SUPPORTED_DEVICE("fb");
|