<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot-toradex.git/arch/arm, branch master</title>
<subtitle>U-Boot bootloader for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/u-boot-toradex.git/'/>
<entry>
<title>arm: dts: renesas: Enable DBSC5 on R-Car R8A78000 X5H Cortex-M33 RSIP port</title>
<updated>2026-06-16T03:38:25+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2026-06-10T18:20:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/u-boot-toradex.git/commit/?id=28f675023da174b1b4817266cac7bcf3ffb6d908'/>
<id>28f675023da174b1b4817266cac7bcf3ffb6d908</id>
<content type='text'>
Bind the DBSC5 DRAM controller driver on boot in board_early_init_r(),
which brings up the DBSC5 DRAM controller and its PHY and which enables
access to DRAM present on this system.

Add default boot command which loads additional bootloader components
from HF and UFS storage into SRAM and DRAM, and starts those components
on SCP and AP core 0. The system is then capable of reaching U-Boot on
the AP core 0. Specifically, the following components are loaded:
- SCP firmware, 384 kiB from HF offset 0x4c0000 to SCP STCM
- TFA BL31, 256 kiB from UFS0 offset 0x5000 * 4 kiB sectors to DRAM 0x8c200000
- TEE, 2 MiB from UFS0 offset 0x5200 * 4 kiB sectors to DRAM 0x8c400000
- U-Boot, 1 MiB from UFS0 offset 0x7200 * 4 kiB sectors to DRAM 0x8c300000
- IPL parameters table is generated at DRAM address 0x8c100000

Enable pstore command support to allow dumping kernel console from
pstore/ramoops, which is convenient for debugging. Use as follows:
=&gt; pstore set 0x80000000 0x10000 0x400 0x8000 0 0 0
=&gt; pstore display console

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Bind the DBSC5 DRAM controller driver on boot in board_early_init_r(),
which brings up the DBSC5 DRAM controller and its PHY and which enables
access to DRAM present on this system.

Add default boot command which loads additional bootloader components
from HF and UFS storage into SRAM and DRAM, and starts those components
on SCP and AP core 0. The system is then capable of reaching U-Boot on
the AP core 0. Specifically, the following components are loaded:
- SCP firmware, 384 kiB from HF offset 0x4c0000 to SCP STCM
- TFA BL31, 256 kiB from UFS0 offset 0x5000 * 4 kiB sectors to DRAM 0x8c200000
- TEE, 2 MiB from UFS0 offset 0x5200 * 4 kiB sectors to DRAM 0x8c400000
- U-Boot, 1 MiB from UFS0 offset 0x7200 * 4 kiB sectors to DRAM 0x8c300000
- IPL parameters table is generated at DRAM address 0x8c100000

Enable pstore command support to allow dumping kernel console from
pstore/ramoops, which is convenient for debugging. Use as follows:
=&gt; pstore set 0x80000000 0x10000 0x400 0x8000 0 0 0
=&gt; pstore display console

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge patch series "Repair boards broken by the 6.1 kbuild bump"</title>
<updated>2026-06-15T18:50:04+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2026-06-15T18:50:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/u-boot-toradex.git/commit/?id=badd97fe24dfb73b2728c26b433cabe315a27971'/>
<id>badd97fe24dfb73b2728c26b433cabe315a27971</id>
<content type='text'>
Simon Glass &lt;sjg@chromium.org&gt; says:

Commit bd3f9ee679b4 added FORCE to several if_changed rules whose
recipes expand $^, so FORCE leaks in as a stray argument and the
command fails. Use $&lt; to restore the Edison and i.MX23/28 images.

Link: https://lore.kernel.org/r/20260613130519.1516808-1-sjg@chromium.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Simon Glass &lt;sjg@chromium.org&gt; says:

Commit bd3f9ee679b4 added FORCE to several if_changed rules whose
recipes expand $^, so FORCE leaks in as a stray argument and the
command fails. Use $&lt; to restore the Edison and i.MX23/28 images.

Link: https://lore.kernel.org/r/20260613130519.1516808-1-sjg@chromium.org
</pre>
</div>
</content>
</entry>
<entry>
<title>arm: mxs: Avoid passing FORCE to commands</title>
<updated>2026-06-15T18:49:56+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2026-06-13T13:05:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/u-boot-toradex.git/commit/?id=3ac35afdd2cc73db0ac3911937ce75b58a6f90b8'/>
<id>3ac35afdd2cc73db0ac3911937ce75b58a6f90b8</id>
<content type='text'>
Commit bd3f9ee679b4 ("kbuild: Bump the build system to 6.1") adds FORCE
as a prerequisite to the if_changed rules here, but the commands use $^
so FORCE leaks in as a stray operand. The dd in cmd_mkalign_mxs fails
(silently, since its stderr is discarded) and the binary is never
aligned, stat in cmd_mkivt_mxs emits an error and cst receives a bogus
argument.

Use $&lt; and $(real-prereqs) instead, which exclude FORCE.

Fixes: bd3f9ee679b4 ("kbuild: Bump the build system to 6.1")
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Commit bd3f9ee679b4 ("kbuild: Bump the build system to 6.1") adds FORCE
as a prerequisite to the if_changed rules here, but the commands use $^
so FORCE leaks in as a stray operand. The dd in cmd_mkalign_mxs fails
(silently, since its stderr is discarded) and the binary is never
aligned, stat in cmd_mkivt_mxs emits an error and cst receives a bogus
argument.

Use $&lt; and $(real-prereqs) instead, which exclude FORCE.

Fixes: bd3f9ee679b4 ("kbuild: Bump the build system to 6.1")
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: renesas: Initialize GIC600 fully on R-Car S4/V4H/V4M</title>
<updated>2026-06-14T02:01:39+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2026-06-14T01:52:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/u-boot-toradex.git/commit/?id=cc5d760ace890b57d78b23aafb47ba220e63ae4f'/>
<id>cc5d760ace890b57d78b23aafb47ba220e63ae4f</id>
<content type='text'>
ARM GIC-600 IP complies with ARM GICv3 architecture, but among others,
implements a power control register in the Redistributor frame. This
register must be programmed to mark the frame as powered on, before
accessing other registers in the frame.

Before the switch to generic lowlevel_init function, this did not pose
a problem as the previous custom lowlevel_init did not access the GICR
registers. The generic function does and that does lead to a hang early
in SPL. Enable the GIC600 initialization variant to mitigate the hang.

Fixes: 37997a214ed1 ("arm: renesas: Use stock lowlevel_init function and remove s_init")
Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
ARM GIC-600 IP complies with ARM GICv3 architecture, but among others,
implements a power control register in the Redistributor frame. This
register must be programmed to mark the frame as powered on, before
accessing other registers in the frame.

Before the switch to generic lowlevel_init function, this did not pose
a problem as the previous custom lowlevel_init did not access the GICR
registers. The generic function does and that does lead to a hang early
in SPL. Enable the GIC600 initialization variant to mitigate the hang.

Fixes: 37997a214ed1 ("arm: renesas: Use stock lowlevel_init function and remove s_init")
Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm: renesas: Make R-Car Gen5 u-boot-elf.shdr compatible with SDK flash_writer</title>
<updated>2026-06-12T22:00:54+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2026-06-11T18:05:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/u-boot-toradex.git/commit/?id=79d6bd525ce03fba9fe958eb11734c1ebb16838a'/>
<id>79d6bd525ce03fba9fe958eb11734c1ebb16838a</id>
<content type='text'>
The SDK 4.32 flash_writer tool, built from the SDK IPL source, requires
SREC S7 "Start address (termination)" record [1] at the end of the SREC
file that is sent to it during installation of content into storage,
otherwise the tool waits for the S7 record indefinitelly and the payload
does not get installed into storage.

Specifically, the tool considers SREC S3 and S7 records as mandatory,
S0, S5, S6 as ignored, and any other records as unsupported.

Configure srec_cat such that it explicitly generates the trailing S7
record, and also that it never generates the ignored S5 Count record.
This fixes installation of u-boot-elf.shdr using the flash_writer tool,
which can not finish successfully without the trailing S7 record.

[1] https://en.wikipedia.org/wiki/Motorola_S-record#Record_types

Fixes: 3b2ce3743c1a ("arm: renesas: Generate u-boot-elf.shdr for R-Car Gen5 RSIP")
Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The SDK 4.32 flash_writer tool, built from the SDK IPL source, requires
SREC S7 "Start address (termination)" record [1] at the end of the SREC
file that is sent to it during installation of content into storage,
otherwise the tool waits for the S7 record indefinitelly and the payload
does not get installed into storage.

Specifically, the tool considers SREC S3 and S7 records as mandatory,
S0, S5, S6 as ignored, and any other records as unsupported.

Configure srec_cat such that it explicitly generates the trailing S7
record, and also that it never generates the ignored S5 Count record.
This fixes installation of u-boot-elf.shdr using the flash_writer tool,
which can not finish successfully without the trailing S7 record.

[1] https://en.wikipedia.org/wiki/Motorola_S-record#Record_types

Fixes: 3b2ce3743c1a ("arm: renesas: Generate u-boot-elf.shdr for R-Car Gen5 RSIP")
Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'u-boot-rockchip-20260610' of https://source.denx.de/u-boot/custodians/u-boot-rockchip</title>
<updated>2026-06-10T19:12:35+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2026-06-10T19:12:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/u-boot-toradex.git/commit/?id=3cdce049f90d77c3f9221f1eb73922384c8972c3'/>
<id>3cdce049f90d77c3f9221f1eb73922384c8972c3</id>
<content type='text'>
CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/30398

Please pull the updates for rockchip platform:
- New Board support: rk3588 FriendlyElec NanoPi R76S
- UFS boot from SPL for rk3576 (NanoPi M5, ROCK 4D)
- Clock support for RK3576 GMAC 25MHz output and RK3528/RK3576 USB3 OTG
- Switch rk3128/rk3229 boards to upstream devicetree
- MAINTAINERS update for upstream devicetree references
- rk3588-rock-5b: Remove USB-C controller from u-boot.dtsi
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/30398

Please pull the updates for rockchip platform:
- New Board support: rk3588 FriendlyElec NanoPi R76S
- UFS boot from SPL for rk3576 (NanoPi M5, ROCK 4D)
- Clock support for RK3576 GMAC 25MHz output and RK3528/RK3576 USB3 OTG
- Switch rk3128/rk3229 boards to upstream devicetree
- MAINTAINERS update for upstream devicetree references
- rk3588-rock-5b: Remove USB-C controller from u-boot.dtsi
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'qcom-main' of https://source.denx.de/u-boot/custodians/u-boot-snapdragon</title>
<updated>2026-06-10T19:11:35+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2026-06-10T19:11:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/u-boot-toradex.git/commit/?id=a30fd0895d1c7cabedac6de79c46a32c9543bd8e'/>
<id>a30fd0895d1c7cabedac6de79c46a32c9543bd8e</id>
<content type='text'>
CI: https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/pipelines/30394

- Define memory map for lemans-evk (pending SMEM)
- Fix CONFIG_SYS_INIT_SP_BSS_OFFSET in db410c chainloaded fragment
- Fix the "dump bootargs" command in the qcom-phone boot menu
- Fix a bug in the rpmh-regulator driver where the regulator mode may
  not be set during enable.
- Enable watchdog autostart for Dragonwing boards
- Fix serial console init on ipq5424-rdp466
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
CI: https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/pipelines/30394

- Define memory map for lemans-evk (pending SMEM)
- Fix CONFIG_SYS_INIT_SP_BSS_OFFSET in db410c chainloaded fragment
- Fix the "dump bootargs" command in the qcom-phone boot menu
- Fix a bug in the rpmh-regulator driver where the regulator mode may
  not be set during enable.
- Enable watchdog autostart for Dragonwing boards
- Fix serial console init on ipq5424-rdp466
</pre>
</div>
</content>
</entry>
<entry>
<title>arm: dts: ipq5424-rdp466: add chosen node for serial console</title>
<updated>2026-06-10T11:36:18+00:00</updated>
<author>
<name>Gurumoorthy Santhakumar</name>
<email>gurumoorthy.santhakumar@oss.qualcomm.com</email>
</author>
<published>2026-06-03T11:38:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/u-boot-toradex.git/commit/?id=757a95c7faae4bdc10dc463c1bb3cf3fee1418a0'/>
<id>757a95c7faae4bdc10dc463c1bb3cf3fee1418a0</id>
<content type='text'>
Add a /chosen node with stdout-path pointing to serial0 (uart1) to
enable the DT-driven console discovery path in
serial_find_console_or_panic().

Without this node, the live DT path in serial_find_console_or_panic()
is skipped and the fallback path is used. Adding the /chosen node makes
the console selection explicit and deterministic, ensuring the correct
serial device is always selected as the console.

Signed-off-by: Gurumoorthy Santhakumar &lt;gurumoorthy.santhakumar@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/20260603113853.3396271-1-gurumoorthy.santhakumar@oss.qualcomm.com
Signed-off-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a /chosen node with stdout-path pointing to serial0 (uart1) to
enable the DT-driven console discovery path in
serial_find_console_or_panic().

Without this node, the live DT path in serial_find_console_or_panic()
is skipped and the fallback path is used. Adding the /chosen node makes
the console selection explicit and deterministic, ensuring the correct
serial device is always selected as the console.

Signed-off-by: Gurumoorthy Santhakumar &lt;gurumoorthy.santhakumar@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/20260603113853.3396271-1-gurumoorthy.santhakumar@oss.qualcomm.com
Signed-off-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dts: lemans-evk-u-boot: add override dtsi</title>
<updated>2026-06-10T11:36:18+00:00</updated>
<author>
<name>Aswin Murugan</name>
<email>aswin.murugan@oss.qualcomm.com</email>
</author>
<published>2026-04-24T10:42:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/u-boot-toradex.git/commit/?id=c2019e01d069c398921abdf8f159136f7e550078'/>
<id>c2019e01d069c398921abdf8f159136f7e550078</id>
<content type='text'>
Add initial support for the lemans EVK platform based on lemans SoC.
Define memory layout statically.

Signed-off-by: Aswin Murugan &lt;aswin.murugan@oss.qualcomm.com&gt;
Signed-off-by: Sumit Garg &lt;sumit.garg@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/20260424104237.968195-1-sumit.garg@kernel.org
Signed-off-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add initial support for the lemans EVK platform based on lemans SoC.
Define memory layout statically.

Signed-off-by: Aswin Murugan &lt;aswin.murugan@oss.qualcomm.com&gt;
Signed-off-by: Sumit Garg &lt;sumit.garg@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/20260424104237.968195-1-sumit.garg@kernel.org
Signed-off-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge patch series "ti: j7: Update to v0.12.0 of DDR config tool"</title>
<updated>2026-06-09T16:26:36+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2026-06-09T16:26:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/u-boot-toradex.git/commit/?id=cf81e36fa0c85117dbfc9a8b606671eb4b25b9db'/>
<id>cf81e36fa0c85117dbfc9a8b606671eb4b25b9db</id>
<content type='text'>
Neha Malcom Francis &lt;n-francis@ti.com&gt; says:

Update all DDR configuration DTSIs to the latest auto-generated output of
the Sysconfig Tool (DDR Configuration for TDA4x, DRA8x, AM67x, AM68x,
AM69x (0.12.00.0000)) [0]

The auto-generated files must not be modified, but effort will be taken to
change the tool output to adhere to the latest checkpatch.pl rules. J722S
and J721E will also be updated in a subsequent series.

All the changes have been kernel boot tested and memtester has passed (same
as v1, as no functional changes made).

[0] https://dev.ti.com/sysconfig/#/start

Link: https://lore.kernel.org/r/20251103071035.674604-1-n-francis@ti.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Neha Malcom Francis &lt;n-francis@ti.com&gt; says:

Update all DDR configuration DTSIs to the latest auto-generated output of
the Sysconfig Tool (DDR Configuration for TDA4x, DRA8x, AM67x, AM68x,
AM69x (0.12.00.0000)) [0]

The auto-generated files must not be modified, but effort will be taken to
change the tool output to adhere to the latest checkpatch.pl rules. J722S
and J721E will also be updated in a subsequent series.

All the changes have been kernel boot tested and memtester has passed (same
as v1, as no functional changes made).

[0] https://dev.ti.com/sysconfig/#/start

Link: https://lore.kernel.org/r/20251103071035.674604-1-n-francis@ti.com
</pre>
</div>
</content>
</entry>
</feed>
