<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot-toradex.git/arch/x86/include/asm, branch master</title>
<subtitle>U-Boot bootloader for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/u-boot-toradex.git/'/>
<entry>
<title>x86: Rename arch/x86/include/asm/pnp_def.h to include/pnp_def.h</title>
<updated>2025-10-28T18:24:03+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-07-11T15:20:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/u-boot-toradex.git/commit/?id=b901d8f15c3b623e6eb01c397cc3140d31388016'/>
<id>b901d8f15c3b623e6eb01c397cc3140d31388016</id>
<content type='text'>
There is nothing x86-centric in this include file, and moving it will
allow for some drivers to be compile-tested on sandbox.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
<content type='xhtml'>
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<pre>
There is nothing x86-centric in this include file, and moving it will
allow for some drivers to be compile-tested on sandbox.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: Move Intel GNVS file into the common include directory</title>
<updated>2025-06-13T19:10:33+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2025-05-28T12:32:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/u-boot-toradex.git/commit/?id=a6e4fdfd77be4bd159cc73214bbf0a96df3aa551'/>
<id>a6e4fdfd77be4bd159cc73214bbf0a96df3aa551</id>
<content type='text'>
Move this so we can include it from sandbox, needed since it is in a
bloblist and must have a check.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
Move this so we can include it from sandbox, needed since it is in a
bloblist and must have a check.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: spl: Add support for NVMe boot device</title>
<updated>2025-05-09T18:57:09+00:00</updated>
<author>
<name>Naresh Solanki</name>
<email>naresh.solanki@9elements.com</email>
</author>
<published>2025-03-12T09:01:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/u-boot-toradex.git/commit/?id=c73acdb392a581ea489001f8da09c43c730b7b98'/>
<id>c73acdb392a581ea489001f8da09c43c730b7b98</id>
<content type='text'>
This change adds `BOOT_DEVICE_NVME` to the `enum` list in
`arch/x86/include/asm/spl.h`,
enabling NVMe as a recognized boot device for SPL (Secondary Program
Loader).

Tested x86 hardware with coreboot + U-Boot payload.
Verified successful boot to NVMe drive.

Signed-off-by: Naresh Solanki &lt;naresh.solanki@9elements.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
This change adds `BOOT_DEVICE_NVME` to the `enum` list in
`arch/x86/include/asm/spl.h`,
enabling NVMe as a recognized boot device for SPL (Secondary Program
Loader).

Tested x86 hardware with coreboot + U-Boot payload.
Verified successful boot to NVMe drive.

Signed-off-by: Naresh Solanki &lt;naresh.solanki@9elements.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpio: x86: Correct usage of IS_ENABLED() macro in intel_pinctrl_defs.h</title>
<updated>2025-05-09T16:42:09+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-02-26T20:31:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/u-boot-toradex.git/commit/?id=c5f57de37c74b96514723f92cbb656d26fb3385c'/>
<id>c5f57de37c74b96514723f92cbb656d26fb3385c</id>
<content type='text'>
This file was using IS_ENABLED() to test for CONFIG flags but omitted
the CONFIG_ prefix and so did not work as expected.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
<content type='xhtml'>
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<pre>
This file was using IS_ENABLED() to test for CONFIG flags but omitted
the CONFIG_ prefix and so did not work as expected.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: cpu: Describe board final hooks in the header</title>
<updated>2025-05-09T16:39:27+00:00</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2024-10-18T15:55:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/u-boot-toradex.git/commit/?id=f183d2c56ba79360e15ff90be6a3bae3ccdb9201'/>
<id>f183d2c56ba79360e15ff90be6a3bae3ccdb9201</id>
<content type='text'>
The new two declarations board_final_init() and board_final_cleanup()
need a description. Add it here.

Suggested-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The new two declarations board_final_init() and board_final_cleanup()
need a description. Add it here.

Suggested-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Revert "Merge patch series "pxe: Precursor series for supporting read_all() in extlinux / PXE""</title>
<updated>2025-04-07T22:35:43+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-04-07T18:35:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/u-boot-toradex.git/commit/?id=f892a7f397a66d8d09f418d1e0e06dfb48bac27d'/>
<id>f892a7f397a66d8d09f418d1e0e06dfb48bac27d</id>
<content type='text'>
This reverts commit 8bc3542384e3a1219e5ffb62b79d16dddc1b1fb9, reversing
changes made to 698edd63eca090a2e299cd3facf90a0b97bed677.

There are still problems with this series to work out.

Link: https://lore.kernel.org/u-boot/CAFLszTjw_MJbK9tpzVYi3XKGazcv55auBAdgVzcAVUta7dRqcg@mail.gmail.com/
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This reverts commit 8bc3542384e3a1219e5ffb62b79d16dddc1b1fb9, reversing
changes made to 698edd63eca090a2e299cd3facf90a0b97bed677.

There are still problems with this series to work out.

Link: https://lore.kernel.org/u-boot/CAFLszTjw_MJbK9tpzVYi3XKGazcv55auBAdgVzcAVUta7dRqcg@mail.gmail.com/
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: Support a 64-bit ramdisk address</title>
<updated>2025-04-03T17:41:55+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2025-03-15T14:25:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/u-boot-toradex.git/commit/?id=c4af65b3ba5dbc51d4875d5ca90ce710f0435776'/>
<id>c4af65b3ba5dbc51d4875d5ca90ce710f0435776</id>
<content type='text'>
Add some missing pieces to bootparams so that a 64-bit ramdisk address
can be used. Tidy up the logging while we are here.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add some missing pieces to bootparams so that a 64-bit ramdisk address
can be used. Tidy up the logging while we are here.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: Add a new API for e820</title>
<updated>2025-04-03T17:41:55+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2025-03-15T14:25:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/u-boot-toradex.git/commit/?id=e15db0236279138959340d4fdda80f93c494db64'/>
<id>e15db0236279138959340d4fdda80f93c494db64</id>
<content type='text'>
The existing mechanism is pretty painful as it requires manual
calculations for anything but a trivial setup.

Add a new API for adding e820 entries.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The existing mechanism is pretty painful as it requires manual
calculations for anything but a trivial setup.

Add a new API for adding e820 entries.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: e820: Add a function to dump the e820 table</title>
<updated>2025-04-03T17:41:55+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2025-03-15T14:25:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/u-boot-toradex.git/commit/?id=1e559930f7d0ab846723fcff52849e8bcacaa57b'/>
<id>1e559930f7d0ab846723fcff52849e8bcacaa57b</id>
<content type='text'>
There is already code for this in zimage. Move it to the e820 file so
it can be used elsewhere.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There is already code for this in zimage. Move it to the e820 file so
it can be used elsewhere.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: Correct msr operation on amd64</title>
<updated>2025-04-03T17:41:55+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2025-03-15T14:25:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/u-boot-toradex.git/commit/?id=a9d106421d48776569fe144c3431739e0fe81b65'/>
<id>a9d106421d48776569fe144c3431739e0fe81b65</id>
<content type='text'>
The CONFIG option is no-longer correct since we can have SPL and PPL
with different bitness.

Fix this and sync up with Linux 6.13 in this area, since this is where
the code came from many years ago.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The CONFIG option is no-longer correct since we can have SPL and PPL
with different bitness.

Fix this and sync up with Linux 6.13 in this area, since this is where
the code came from many years ago.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
