With commit 0535e46d55d7 ("scripts/dtc: Update to upstream version
v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d75 ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Aligns the final section before _end by 8-bytes by adding '. =
  ALIGN(8);' or changing an existing ALIGN(4) statement.
- Ensure that we do have alignment by adding an ASSERT so that when not
  aligned we fail to link (and explain why).

Signed-off-by: Tom Rini <trini@konsulko.com>

Our last sync with the kernel was 5.1. Even that was a partial one
as some patches from 4.x kernels were already missing making the
transition to a modern kbuild infeasible.

We are so out of sync now, that tracking the patches and backporting
them one by one makes little sense and it's going to take ages.

This is an attempt to sync up Makefile[.lib/.kbuild].
Unfortunately due to sheer amount of patches this is not easy to review,
but that's what we decided during a community call.

One of the biggest changes is get rid of partial linking entirely and
build .a archives isntead of .o.
We diaviate from the kernel on that. Instead of calling a custom script
to create the archive symbol table, we call ar with rcTP (isntead of
rcSTP) since we want a resulting archive that's sauble with the linker.

The only affected platforms are PPC ones. Unfortunately I don't have any
of them around to test, but the objdump of the resulting files --
arch/powerpc/lib/built-in.[oa] looks identical.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>

Instead of cross using cross-directory makefile directives,
add a Makefile in board/cssi/common/ directory in order to
benefit from HAVE_VENDOR_COMMON_LIB logic.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>

CMPC885 board can be pluged on a mother board with fibre interface, so
fibre interface MAC address must be initialised for that case.

Signed-off-by: Hugo Dubois <hugo.dubois.ext@csgroup.eu>
Reviewed-by: CASAUBON Jean Michel <jean-michel.casaubon@csgroup.eu>
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>

HUSH shell is not always wanted/desirable.

Add missing braces in environment in order to allow use without
HUSH shell.

Signed-off-by: Jean-Michel CASAUBON <jean-michel.casaubon@csgroup.eu>
Cc: DUBOIS Hugo <hugo.dubois.ext@csgroup.eu>
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>

In most cases, the architecture global data currently makes use of
assorted linux types, but does not include <linux/types.h> to provide
them. Add <linux/types.h> instead of relying on indirect inclusion.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>

Remove inclusion of common.h and add relevant
includes when necessary.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>

When CMPC885 board is used for MIAE device, SCC2 SCC3 and SMC2
are used for serial lines. Therefore only SCC4 is available for
handling the TDM line.

In order to use SCC4 in QMC mode without loosing SMC2, SMC2
must be relocated.

Activate SMC relocation and relocate SMC2 at offset 0x1fc0 which
is unused.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>

In order to know the motherboard type earlier, perform I/O ports
initialisation and FPGA loading in board_early_init_f() instead
of board_early_init_r().

This is needed to be able to load mpc8xx CPM microcode base on
motherboard type and before starting to use the CPM.

Console is not available yet so remove the printfs.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>

A duplicated FPGA loading sequence appears after FPGA reset.

Remove it.

Fixes: dac3c6f625 ("board: cssi: Add new board MCR3000_2G")
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>