u-boot-toradex.git/board/xilinx/mbv, branch master U-Boot bootloader for Apalis and Colibri modules board: xilinx: add SPL boot device support 2025-12-19T07:25:27+00:00 Padmarao Begari padmarao.begari@amd.com 2025-12-03T07:36:59+00:00 c8898f12d307db97ad2a18442273b7f0e2750c01 Add board_boot_order() function and remove spl_boot_device() function because it is called from weak board_boot_order(). Add support to U-Boot SPL for booting from RAM or SPI, as configured in defconfig. Signed-off-by: Padmarao Begari <padmarao.begari@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/a1f26a9392128309a1affed28b14809845714c21.1764747417.git.michal.simek@amd.com 
Add board_boot_order() function and remove spl_boot_device()
function because it is called from weak board_boot_order().

Add support to U-Boot SPL for booting from RAM or SPI, as
configured in defconfig.

Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a1f26a9392128309a1affed28b14809845714c21.1764747417.git.michal.simek@amd.com
xilinx: mbv: Disable OF_HAS_PRIOR_STAGE 2025-08-14T06:32:00+00:00 Michal Simek michal.simek@amd.com 2025-07-22T11:03:43+00:00 5f5bba72c2f6f444cabff459ad3927fdc86dbdb3 There is no reason to use OF_BOARD for MBV because reduced DT is used by SPL and full DT is passed via u-boot.img or u-boot.itb. There is no reason to pick up DTB from certain address. Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> 
There is no reason to use OF_BOARD for MBV because reduced DT is used by
SPL and full DT is passed via u-boot.img or u-boot.itb. There is no reason
to pick up DTB from certain address.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
treewide: Remove empty board_init() function from all boards 2025-07-24T19:30:19+00:00 Sam Protsenko semen.protsenko@linaro.org 2025-07-17T02:44:26+00:00 70a4d1fa1ddb2f5f8f9a27442563f182549abbb5 Commit 86acdce2ba88 ("common: add config for board_init() call") introduced CONFIG_BOARD_INIT option. This option can be disabled for the boards where board_init() function is not needed. Remove empty board_init() calls for all boards where it's possible, and disable CONFIG_BOARD_INIT in all related defconfigs. This cleanup was made semi-automatically using these scripts: [1]. No functional change, but the binary size for the modified boards is reduced a bit. [1] https://github.com/joe-skb7/uboot-convert-scripts/tree/master/remove-board-init Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Tested-by: Adam Ford <aford173@gmail.com> #imx8mm_beacon Tested-by: Bryan Brattlof <bb@ti.com> Acked-by: Peng Fan <peng.fan@nxp.com> #NXP boards 
Commit 86acdce2ba88 ("common: add config for board_init() call")
introduced CONFIG_BOARD_INIT option. This option can be disabled for the
boards where board_init() function is not needed. Remove empty
board_init() calls for all boards where it's possible, and disable
CONFIG_BOARD_INIT in all related defconfigs.

This cleanup was made semi-automatically using these scripts: [1].

No functional change, but the binary size for the modified boards is
reduced a bit.

[1] https://github.com/joe-skb7/uboot-convert-scripts/tree/master/remove-board-init

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Adam Ford <aford173@gmail.com> #imx8mm_beacon
Tested-by: Bryan Brattlof <bb@ti.com>
Acked-by: Peng Fan <peng.fan@nxp.com>  #NXP boards
riscv: mbv: Align DT with QEMU 2024-10-29T10:11:49+00:00 Michal Simek michal.simek@amd.com 2024-10-23T06:06:40+00:00 9d688e6da5c97fc7758bfa2367fe29cb75ae4868 Align U-Boot with QEMU amd-microblaze-v-virt platform to be able to wire it with CI. Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Padmarao Begari <padmarao.begari@amd.com> 
Align U-Boot with QEMU amd-microblaze-v-virt platform to be able to wire
it with CI.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Padmarao Begari <padmarao.begari@amd.com>
Merge tag 'xilinx-for-v2024.07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze 2024-04-10T17:51:58+00:00 Tom Rini trini@konsulko.com 2024-04-10T17:51:58+00:00 843143303cb64133427ab1b3166185e936233d50 Xilinx changes for v2024.07-rc1 xilinx: - Do not call env_get_location when !ENV_IS_NOWHERE - Add FDT_FIXUP_PARTITIONS support - Fix legacy format MAC decoding zynqmp: - Enable semihosting SPL support - DT updates - Kconfig resort/cleanup - Don't describe second image/capsule if !SPL - Add support for dfu/capsule description via MTD - Support JTAG as alternative boot mode - Add support for TEG soc variant zynqmp-kria: - Wire usb4 boot device - Update SDIO tristate pin configuration - Disable SPI_FLASH_BAR to avoid issue with SPI after update mbv: - Enable SPL and binman - Small platform changes zynqmp-nand: - Error out in case of unsupported SW ECC - Clean error path versal-net: - Support multiple locations for variables 
Xilinx changes for v2024.07-rc1

xilinx:
- Do not call env_get_location when !ENV_IS_NOWHERE
- Add FDT_FIXUP_PARTITIONS support
- Fix legacy format MAC decoding

zynqmp:
- Enable semihosting SPL support
- DT updates
- Kconfig resort/cleanup
- Don't describe second image/capsule if !SPL
- Add support for dfu/capsule description via MTD
- Support JTAG as alternative boot mode
- Add support for TEG soc variant

zynqmp-kria:
- Wire usb4 boot device
- Update SDIO tristate pin configuration
- Disable SPI_FLASH_BAR to avoid issue with SPI after update

mbv:
- Enable SPL and binman
- Small platform changes

zynqmp-nand:
- Error out in case of unsupported SW ECC
- Clean error path

versal-net:
- Support multiple locations for variables
riscv: mbv: Enable SPL and binman 2024-03-01T07:41:39+00:00 Michal Simek michal.simek@amd.com 2024-02-14T11:52:33+00:00 451b2ea21105ec302369093f2d1e25183d35fd3d Enable SPL and binman to generate u-boot.img (machine mode) and u-boot.itb (supervisor mode). DTB is placed at fixed address to ensure that it is 8 byte aligned which is not ensured when dtb is attached behind SPL binary that's why SPL and U-Boot are taking DTB from the same address. Also align addresses for both defconfigs. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/85506bce5580d448f095f267d029e3932c5e9990.1707911544.git.michal.simek@amd.com 
Enable SPL and binman to generate u-boot.img (machine mode) and u-boot.itb
(supervisor mode). DTB is placed at fixed address to ensure that it is 8
byte aligned which is not ensured when dtb is attached behind SPL binary
that's why SPL and U-Boot are taking DTB from the same address.
Also align addresses for both defconfigs.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/85506bce5580d448f095f267d029e3932c5e9990.1707911544.git.michal.simek@amd.com
riscv: mbv: Align addresses with default DT 2024-03-01T07:41:38+00:00 Michal Simek michal.simek@amd.com 2024-02-14T11:52:29+00:00 8ef750872e33217e174387dc5b8db6d2d8650583 Better to align everything with memory map described in DT to avoid mistakes. Execute both modes form the same address to make address map more understandable. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/be54c668d5626ccd702507a86c2a95d1eaefc690.1707911544.git.michal.simek@amd.com 
Better to align everything with memory map described in DT to avoid
mistakes. Execute both modes form the same address to make address map more
understandable.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/be54c668d5626ccd702507a86c2a95d1eaefc690.1707911544.git.michal.simek@amd.com
xilinx_mbv: Remove empty config header 2024-02-27T19:18:30+00:00 Tom Rini trini@konsulko.com 2024-01-22T22:39:06+00:00 e82f7c627cd0bee334273541fa41b26eb9a9ab8a Now that we support having CONFIG_SYS_CONFIG_NAME be unset to indicate a lack of board.h file, unset this on the xilinx_mbv platforms and remove the otherwise empty file. Acked-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Tom Rini <trini@konsulko.com> 
Now that we support having CONFIG_SYS_CONFIG_NAME be unset to indicate a
lack of board.h file, unset this on the xilinx_mbv platforms and remove
the otherwise empty file.

Acked-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
riscv: Add support for AMD/Xilinx MicroBlaze V 2023-12-18T03:08:49+00:00 Michal Simek michal.simek@amd.com 2023-11-06T11:56:47+00:00 7576ab2facae92f4062f88c4f643e2548e112437 MicroBlaze V is new AMD/Xilinx soft-core 32bit RISC-V processor IP. It is hardware compatible with classic MicroBlaze processor. The patch contains initial wiring and configuration for initial HW design with memory, cpu, interrupt controller, timers and uartlite console (interrupt controller is listed but U-Boot is not using it). Provided DT is just describing one configuration and should be taken only as example. Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com> 
MicroBlaze V is new AMD/Xilinx soft-core 32bit RISC-V processor IP.
It is hardware compatible with classic MicroBlaze processor.

The patch contains initial wiring and configuration for initial HW design
with memory, cpu, interrupt controller, timers and uartlite console
(interrupt controller is listed but U-Boot is not using it).

Provided DT is just describing one configuration and should be taken only
as example.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>