Coding Style cleanup; update CHANGELOG, prepare -rc1v2009.11-rc1

Signed-off-by: Wolfgang Denk <wd@denx.de>

16 files changed, 6210 insertions, 56 deletions

diff --git a/CHANGELOG b/CHANGELOG
index e2f2b3e61ed..bd16ed87442 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -1,3 +1,5422 @@
+commit 246c69225c7b962d5c93e92282b78ca9fc5fefee
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Sun Oct 25 15:12:56 2009 -0500
+
+    Add 'editenv' command
+
+    The editenv command can be used to edit an environment variable.
+    Editing an environment variable is useful when one wants to tweak an
+    existing variable, for example fix a typo or change the baudrate in the
+    'bootargs' environment variable.
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit b0fa8e50632a628766db23f5c884ec63f1469552
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Sun Oct 25 15:12:55 2009 -0500
+
+    setenv(): Delete 0-length environment variables
+
+    Previously setenv() would only delete an environment variable if it
+    was passed a NULL string pointer as a value.  It should also delete an
+    environment variable when it encounters a valid string pointer of
+    0-length.
+
+    This change/fix is generally useful and is necessary for the upcoming
+    "editenv" command.
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit ecc5500ee487170d8af6ff893fd1e0082380a01a
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Sun Oct 25 15:12:54 2009 -0500
+
+    readline(): Add ability to modify a string buffer
+
+    If the 'buf' parameter is a non-0-length string, its contents will be
+    edited.  Previously, the initial contents of 'buf' were ignored and the
+    user entered its contents from scratch.
+
+    This change is necessary to support the upcoming "editenv" command but
+    could also be used for future commands which require a user to modify
+    an existing string.
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit f923943843cd617d681387e7fe81a48060cc6401
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Sun Oct 25 15:12:53 2009 -0500
+
+    cread_line(): Remove unused variables
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit e491a71e578e93bd3b2f8f20d8ef8f111c98010d
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Sun Oct 25 15:12:52 2009 -0500
+
+    Check for NULL prompt in readline_into_buffer()
+
+    Previously, passing readline() or readline_into_buffer() a NULL 'prompt'
+    parameter would result in puts() printing garbage when
+    CONFIG_CMDLINE_EDITING was enabled.
+
+    Note that no board currently triggers this bug.  Enabling
+    CONFIG_CMDLINE_EDITING on some boards (eg bab7xx) would result in
+    the bug appearing.	This change is only intended to prevent someone
+    from running into this issue in the future.
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 16d1c10783660f3fdbc3c19141f42f3b0d1834d3
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Sun Oct 25 23:00:09 2009 +0100
+
+    drivers/net/phy/miiphybb.c: fix warning: no newline at end of file
+
+    Add missing newline.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+    Cc: Luigi Mantellini <luigi.mantellini@idf-hit.com>
+    Cc: Ben Warren <biggerbadderben@gmail.com>
+
+commit a747a7f31059b9069e97c78bba5496409c33aa05
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Tue Oct 27 00:03:32 2009 +0100
+
+    Revert "env: only build env_embedded and envcrc when needed"
+
+    Breaks building on many boards, and no really clean fix available yet.
+
+    This reverts commit 6dab6add2d8ee80905234b326abc3de11be1d178.
+
+commit 3fca80375981fe83d4674a0267183b469a1ea7ff
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date:	Thu Oct 15 17:47:16 2009 +0400
+
+    mpc85xx: Configure QE USB for MPC8569E-MDS boards
+
+    Setup QE pin multiplexing for USB function, configure needed BCSRs
+    and add some fdt fixups.
+
+    Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 14809b6c21c89dd65abaf3fea7627fb5ea0f78a3
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date:	Thu Oct 15 17:47:13 2009 +0400
+
+    mpc85xx: Configure QE UART for MPC8569E-MDS boards
+
+    To make QE UART usable by Linux we should setup pin multiplexing
+    and turn UCC2 Ethernet node into UCC2 QE UART node.
+
+    Also, QE UART is mutually exclusive with UART0, so we can't enable
+    it if eSDHC is in 4-bits mode on pilot boards, or if it's a prototype
+    board with eSDHC in 1- or 4-bits mode.
+
+    Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 70d665b1d230b9575a647948e8db3da1e6743e5c
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date:	Thu Oct 15 17:47:11 2009 +0400
+
+    mpc85xx: Setup QE pinmux for SPI Flash on MPC8569E-MDS boards
+
+    SPI Flash (M25P40) is connected to the SPI1 bus, we need a few
+    qe_iop entries to actually enable SPI1 on these boards.
+
+    Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 65dec3b4599a17e83ec69dfd059e4ea1e795ef37
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date:	Thu Oct 15 17:47:09 2009 +0400
+
+    mpc85xx: Setup SRIO memory region LAW for MPC8569E-MDS boards
+
+    This patch sets memory window for Serial RapidIO on MPC8569E-MDS
+    boards.
+
+    Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit a29155e12286cc5ec2df72c1cab28e3659bfdad5
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date:	Thu Oct 15 17:47:08 2009 +0400
+
+    mpc85xx: Add eLBC NAND support for MPC8569E-MDS boards
+
+    Simply add some defines, and adjust TLBe setup to include some
+    space for eLBC NAND.
+
+    Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 7f52ed5ef1b490da282ace3316be381a6abf96a5
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date:	Thu Oct 15 17:47:06 2009 +0400
+
+    mpc85xx: Add eSDHC support for MPC8569E-MDS boards
+
+    eSDHC is mutually exlusive with UART0 (in 4-bits mode) and I2C2
+    (in 1-bit mode). When eSDHC is used, we should switch u-boot console to
+    UART1, and make the proper device-tree fixups.
+
+    Because of an erratum in prototype boards it is impossible to use eSDHC
+    without disabling UART0 (which makes it quite easy to 'brick' the board
+    by simply issung 'setenv hwconfig esdhc', and not able to interact with
+    U-Boot anylonger).
+
+    So, but default we assume that the board is a prototype, which is a most
+    safe assumption. There is no way to determine board revision from a
+    register, so we use hwconfig.
+
+    Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 48618126f78f05042dae428811809b594f747eb9
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Fri Oct 23 15:55:48 2009 -0500
+
+    xpedite5370: Enable multi-core support
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 5ccd29c3679b3669b0bde5c501c1aa0f325a7acb
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Fri Oct 23 15:55:47 2009 -0500
+
+    85xx: MP Boot Page Translation update
+
+    This change has 3 goals:
+    - Have secondary cores be released into spin loops at their 'true'
+      address in SDRAM.  Previously, secondary cores were put into spin
+      loops in the 0xfffffxxx address range which required that boot page
+      translation was always enabled while cores were in their spin loops.
+
+    - Allow the TLB window that the primary core uses to access the
+      secondary cores boot page to be placed at any address.  Previously, a
+      TLB window at 0xfffff000 was always used to access the seconary cores'
+      boot page.  This TLB address requirement overlapped with other
+      peripherals on some boards (eg XPedite5370).  By default, the boot
+      page TLB will still use the 0xfffffxxx address range, but this can be
+      overridden on a board-by-board basis by defining a custom
+      CONFIG_BPTR_VIRT_ADDR.  Note that the TLB used to map the boot page
+      remains in use while U-Boot executes.  Previously it was only
+      temporarily used, then restored to its initial value.
+
+    - Allow Boot Page Translation to be disabled on bootup.  Previously,
+      Boot Page Translation was always left enabled after secondary cores
+      were brought out of reset.  This caused the 0xfffffxxx address range
+      to somewhat "magically" be translated to an address in SDRAM.  Some
+      boards may not want this oddity in their memory map, so defining
+      CONFIG_MPC8xxx_DISABLE_BPTR will turn off Boot Page Translation after
+      the secondary cores are initialized.
+
+    These changes are only applicable to 85xx boards with CONFIG_MP defined.
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 70ed869ea5f6b1d13d7b140c83ec0dcd8a127ddc
+Author: Vivek Mahajan <vivek.mahajan@freescale.com>
+Date:	Tue Oct 27 12:18:55 2009 +0530
+
+    ppc/85xx/pci: fsl_pci_init: pcie agent mode support
+
+    Originally written by Jason Jin and Mingkai Hu for mpc8536.
+
+    When QorIQ based board is configured as a PCIe agent, then unlock/enable
+    inbound PCI configuration cycles and init a 4K inbound memory window;
+    so that a PCIe host can access the PCIe agents SDRAM at address 0x0
+
+    * Supported in fsl_pci_init_port() after adding pcie_ep as a param
+    * Revamped copyright in drivers/pci/fsl_pci_init.c
+    * Mods in 85xx based board specific pci init after this change
+
+    Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 273a28ad9ef59dcfcd4c056ec1f61f1e0896cfaa
+Author: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+Date:	Tue Oct 27 09:36:38 2009 +0530
+
+    85xx/p1_p2_rdb: Fixing DDR configuration for 800MHz data rate
+
+    Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 924024c396761c267b948f38d78e9905f2036501
+Author: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+Date:	Tue Oct 27 09:26:55 2009 +0530
+
+    85xx/p1_p2rdb: Fix crash while configuring 32 bit DDR i/f for P1020RDB.
+
+    The data being modified was in NOR flash which caused the crash.
+
+    Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 3e303f748cf57fb23e8ec95ab7eac0074be50e2b
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date:	Thu Oct 15 17:47:04 2009 +0400
+
+    fdt_support: Add multi-serial support for stdout fixup
+
+    Currently fdt_fixup_stdout() is using hard-coded CONFIG_CONS_INDEX
+    constant. With multi-serial support, the CONS_INDEX may no longer
+    represent actual console, so we should try to extract port number
+    from the current stdio device name instead of always hard-coding the
+    constant value.
+
+    Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+    Acked-by: Gerald Van Baren <vanbaren@cideas.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit da0e5f7ee828f246d85997486fff308837069453
+Author: Leon Woestenberg <leon.woestenberg@gmail.com>
+Date:	Mon Oct 26 10:03:32 2009 +0100
+
+    ppc/85xx: Fix crashes due to generation of SPE instruction
+
+    U-Boot crashed on the last instruction:
+
+    int parse_stream_outer(struct in_str *inp, int flag)
+    {
+    effa4784:	    94 21 ff 38     stwu    r1,-200(r1)
+    effa4788:	    7c 08 02 a6     mflr    r0
+    effa478c:	    42 9f 00 05     bcl-    20,4*cr7+so,effa4790 <parse_stream_outer+0xc>
+    effa4790:	    7d 80 00 26     mfcr    r12
+    effa4794:	    13 c1 b3 21     evstdd  r30,176(r1)
+
+    ...which is a  SPE instruction, although -mno-spe was used.
+
+    tmp/cross/ppce500v2/bin/powerpc-angstrom-linux-gnuspe-gcc --version
+    powerpc-angstrom-linux-gnuspe-gcc (GCC) 4.3.3
+
+    Seems to be a known issue (since 2008-04?!)
+
+    Googled some, turns out this patch/workaround works for me on MPC8536DS.
+
+    See http://gcc.gnu.org/ml/gcc-patches/2008-04/msg00311.html for more info
+
+    Signed-off-by: Leon Woestenberg <leon@sidebranch.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 654ea1f3184235694306ddc5874baa27ad3018fe
+Author: Dave Liu <daveliu@freescale.com>
+Date:	Thu Oct 22 00:10:23 2009 -0500
+
+    ppc/85xx: Make L2 support more robust
+
+    According the user manual, we need loop-check the L2 enable bit set.
+
+    Signed-off-by: Dave Liu <daveliu@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 613ad28c3da4c7fc6336ef9d94993b25a5d0586e
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Mon Oct 26 21:21:25 2009 -0500
+
+    ppc/85xx: Fix compiler warning in nand_spl/.../p1_p2_rdb/nand_boot.c
+
+    nand_boot.c: In function 'board_init_f':
+    nand_boot.c:44: warning: 'sys_clk' may be used uninitialized in this function
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit e8967d96a0e8d09d91a3b7bd292746996dd8e7ac
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Mon Oct 26 21:18:33 2009 -0500
+
+    ppc/85xx: Fix building NAND_SPL out of tree
+
+    We need to source files to exist in the O=<FOO> nand_spl dir when
+    we build out of tree.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit f3ee25859e3920ee7c7cc519a3e6f60d70d7a53f
+Author: Matthias Fuchs <matthias.fuchs@esd.eu>
+Date:	Fri Oct 23 10:52:38 2009 +0200
+
+    License cleanup: Fix license header for some esd display configurations
+
+    These files were autogenerated by EPSON configuration tools.
+    This patch replaces the autogenerated file headers by the GPL
+    license notice.
+
+    This change is done with the explicit permission
+    of Epson Research & Development / IC Software Development.
+
+    Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
+
+commit 4166ee58d30ada7b298b9c941067f0341c2dccbe
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Fri Oct 9 17:12:44 2009 -0400
+
+    sf: add GPL-2 license info
+
+    Some of the new spi flash files were missing explicit license lines.
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+    CC: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit d535a493004fb701f131b132402a7704f9c9342d
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Wed Oct 21 23:29:51 2009 -0500
+
+    fdt: Fix fdt padding issue for initrd mem_rsv
+
+    Its possible that we end up with a device tree that happens to be a
+    particular size that after we call fdt_resize() we don't have any
+    space left for the initrd mem_rsv.
+
+    Fix this be adding a second mem_rsv into the size calculation.  We
+    had one to cover the fdt itself and we have the potential of adding
+    a second for the initrd.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+    Acked-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit 4bc3d2afb380e78fdbb9c501d9a8da6d59eb178e
+Author: Steve Sakoman <sakoman@gmail.com>
+Date:	Tue Oct 20 18:21:18 2009 +0200
+
+    ARM: OMAP3: Refactors the SM911x driver
+
+    Move the test up in the function to not hang on systems without ethernet.
+
+    Signed-off-by: Steve Sakoman <sakoman@gmail.com>
+    Acked-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit f3807374787e4394efb767e2e8527887f57e51b8
+Author: Minkyu Kang <mk7.kang@samsung.com>
+Date:	Thu Oct 15 11:19:15 2009 +0900
+
+    s5pc1xx: SMDKC100: fix compile warnings
+
+    fix the following compile warnings
+    warning: dereferencing type-punned pointer will break strict-aliasing rules
+
+    Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
+
+commit 8003c361deec3ee651451662efd05352f1abdd40
+Author: Simon Kagstrom <simon.kagstrom@netinsight.net>
+Date:	Tue Oct 6 08:44:22 2009 +0200
+
+    arm926ejs: 8-byte align stack to avoid LDRD/STRD problems
+
+    U-boot for Marvell Kirkwood boards no longer work after the EABI changes
+    introduced in commit f772acf8a584067033eff1e231fcd1fb3a00d3d9. This
+    turns out to be caused by a stack alignment issue. The armv5te
+    instructions ldrd/strd instructions require 8-byte alignment to work
+    properly (otherwise undefined behavior).
+
+    Tested on an OpenRD base board, where both printouts and ubifs stuff now
+    works.
+
+    Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
+
+commit e63e5904b48528f3f3cc98317df6fc62fab25bf9
+Author: Tom Rix <Tom.Rix@windriver.com>
+Date:	Sat Oct 17 12:41:06 2009 -0500
+
+    TI OMAP3 SDP3430: Initial Support
+
+    Start of support of
+    Texas Instruments Software Development Platform(SDP)
+    for OMAP3430 - SDP3430
+
+    Highlights of this platform are:
+    Flash Memory devices:
+	Sibley NOR, Micron 8bit NAND and OneNAND
+    Connectivity:
+	3 UARTs and expanded 4 UART ports + IrDA
+	Ethernet, USB
+    Other peripherals:
+	TWL5030 PMIC+Audio+Keypad
+	VGA display
+    Expansion ports:
+	Memory devices plugin boards (PISMO)
+	Connectivity board for GPS,WLAN etc.
+    Completely configurable boot sequence and device mapping
+    etc.
+
+    Support default jumpering and:
+     - UART1/ttyS0 console(legacy sdp3430 u-boot)
+     - UART3/ttyS2 console (matching other boards,
+		 and SDP HW docs)
+     - Ethernet
+     - mmc0
+     - NOR boot
+
+    Currently the UART1 is enabled by default.	for
+    compatibility with other OMAP3 u-boot platforms,
+    enable the #define of CONSOLE_J9.
+
+    Conflicts:
+
+	Makefile
+
+    Fixed the conflict with smdkc100_config by moving omap_sdp3430_config
+    to it is alphabetically sorted location above zoom1.
+
+    Signed-off-by: David Brownell <david-b@pacbell.net>
+    Signed-off-by: Nishanth Menon <nm@ti.com>
+    Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
+
+commit a4474ff8629be5f28aefb8a9f48d4411d62fb0d2
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date:	Tue Oct 13 19:35:11 2009 -0400
+
+    TI DaVinci: Adding Copyright for DM365 EVM
+
+    Forgot to add Copyright while submitting the patch.
+    This patch adds the copyright.
+
+    Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 11b0102218bbb50ac5c04f1521f2a22ed4e90cf1
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date:	Tue Oct 13 12:32:32 2009 -0400
+
+    TI DaVinci: Fix DM6467 EVM Compilation Warning
+
+    Due to new TI boards being added to U-Boot, the hardware.h
+    is getting very messy. The warning being fixed is due to
+    the EMIF addresses being redefined.
+
+    The long term solution(after 2009.11) to this is to
+    have SOC specific header files.
+
+    Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit fac1ef4ba685606bf28349d18e050ea08b50e669
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date:	Tue Oct 13 12:01:52 2009 -0400
+
+    TI DaVinci: DM355 Leopard: Fix compilation warning
+
+    We get a compliation warning when we enable the NAND driver
+    for DM355 leopard. The waring we get is that we have
+    an implicit declaration of davinci_nand_init.
+
+    It is fixed by including the asm/arch/nand_defs.h header file
+
+    Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit f8a812aa656bc34622303a26fa5003d19c34aeed
+Author: Nishanth Menon <nm@ti.com>
+Date:	Tue Oct 13 12:49:55 2009 -0400
+
+    TI OMAP3: make gpmc_config as const
+
+    gpmc_config should not be a variant as it is board specific
+    hence make it a const parameter
+
+    Fixes issues identified by Dirk:
+    - build issue for zoom2
+    - warnings for all other OMAP3 platforms using nand/onenand etc
+
+    Signed-off-by: Nishanth Menon <nm@ti.com>
+
+commit cfc25874624a328f53ad59b1206e2103f2e62d74
+Author: Stefan Roese <sr@denx.de>
+Date:	Mon Oct 19 16:19:36 2009 +0200
+
+    ppc4xx: Sequoia: Add chip_config command
+
+    This patch removes the Sequoia "bootstrap" command and replaces it
+    with the now common command "chip_config".
+
+    Please note that the patches with the dynamic PCI sync clock
+    configuration have to be applied, before this one should go in.
+    This is because Sequoia has 2 different bootstrap EEPROMs, and
+    the old bootstrap command configured different values depending
+    on the detected PCI async clock (33 vs. 66MHz). With the PCI sync
+    clock patches, this is not necessary anymore. The PCI sync clock
+    will be configured correctly on-the-fly now.
+
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit c85b58397030e25e146ccf5085c86221c40c53b3
+Author: Stefan Roese <sr@denx.de>
+Date:	Mon Oct 19 14:14:08 2009 +0200
+
+    ppc4xx: Yosemite/Yellowstone: Check and reconfigure the PCI sync clock
+
+    This patch now uses the 440EP(x)/GR(x) function to check and dynamically
+    reconfigure the PCI sync clock.
+
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 23c51a2d6393cd3be9eb62cb42d92138ff6db8a9
+Author: Stefan Roese <sr@denx.de>
+Date:	Mon Oct 19 14:10:50 2009 +0200
+
+    ppc4xx: Sequoia/Rainer: Check and reconfigure the PCI sync clock
+
+    This patch now uses the 440EP(x)/GR(x) function to check and dynamically
+    reconfigure the PCI sync clock.
+
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 08c6a2628478ace808b3767db17e4148cac5a7fb
+Author: Stefan Roese <sr@denx.de>
+Date:	Mon Oct 19 14:44:11 2009 +0200
+
+    ppc4xx: Print PCI synchronous clock frequency upon bootup
+
+    Some 4xx variants (e.g. 440EP(x)/GR(x)) have an internal
+    synchronous PCI clock. Knowledge about the currently configured
+    value might be helpful. So let's print it out upon bootup.
+
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 5e47f9535f53fd4cc05f32fb6166870f976fbb4e
+Author: Stefan Roese <sr@denx.de>
+Date:	Mon Oct 19 14:06:23 2009 +0200
+
+    ppc4xx: Add function to check and dynamically change PCI sync clock
+
+    PPC440EP(x)/PPC440GR(x):
+    In asynchronous PCI mode, the synchronous PCI clock must meet
+    certain requirements. The following equation describes the
+    relationship that must be maintained between the asynchronous PCI
+    clock and synchronous PCI clock. Select an appropriate PCI:PLB
+    ratio to maintain the relationship:
+
+    AsyncPCIClk - 1MHz <= SyncPCIclock <= (2 * AsyncPCIClk) - 1MHz
+
+    This patch now adds a function to check and reconfigure the sync
+    PCI clock to meet this requirement. This is in preparation for
+    some AMCC boards (Sequoia/Rainier and Yosemite/Yellowstone) using this
+    function to not violate the PCI clocking rules.
+
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 92b8964bed0d1b779d9e26be4e16755b5c635415
+Author: Stefan Roese <sr@denx.de>
+Date:	Fri Oct 16 10:01:09 2009 +0200
+
+    ppc4xx: Update flash size in reg property of the NOR flash node
+
+    Till now only the ranges in the ebc node are updated with the values
+    currently configured in the PPC4xx EBC controller. With this patch now
+    the NOR flash size is updated in the device tree blob as well. This is
+    done by scanning the compatible nodes "cfi-flash" and "jedec-flash"
+    for the correct chip select number.
+
+    This size fixup is enabled for all AMCC eval board right now. Other
+    4xx boards may want to enable it as well, if this problem with multiple
+    NOR FLASH sizes exists.
+
+    Signed-off-by: Stefan Roese <sr@denx.de>
+    Cc: Wolfgang Denk <wd@denx.de>
+
+commit 30d45c0d3ea2231f9131276ea113595959a0720e
+Author: Stefan Roese <sr@denx.de>
+Date:	Wed Oct 21 11:59:52 2009 +0200
+
+    fdt: Add fdt_fixup_nor_flash_size() to fixup NOR FLASH size in dtb
+
+    This function can be used to update the size in the "reg" property
+    of the NOR FLASH device nodes. This is necessary for boards with
+    non-fixed NOR FLASH sizes.
+
+    Signed-off-by: Stefan Roese <sr@denx.de>
+    Acked-by: Gerald Van Baren <vanbaren@cideas.com>
+    Acked-by: Wolfgang Denk <wd@denx.de>
+
+commit 76706cb86b1c76954ff5353db6757ab99cfd95fb
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Tue Oct 20 23:12:13 2009 +0200
+
+    cpu/ppc4xx/fdt.c: avoid strcpy() to constant string
+
+    strcpy() was iused with the target address being a pointer to a
+    constant string, which potentially is read-only. Use a (writable)
+    array of characters instead.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 0e1ac981194aa0d92eff0934442cec48a4f57834
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Tue Oct 20 23:07:04 2009 +0200
+
+    cpu/ppc4xx/fdt.c: avoid strcpy() to constant string
+
+    strcpy() was iused with the target address being a pointer to a
+    constant string, which potentially is read-only. Use a (writable)
+    array of characters instead.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit c55096c084308c08bf8891c190f90bdc3a232394
+Author: Daniel Mack <daniel@caiaq.de>
+Date:	Wed Apr 8 13:23:38 2009 +0200
+
+    smc911x: add support for LAN9220
+
+    Signed-off-by: Daniel Mack <daniel@caiaq.de>
+    Cc: Sascha Hauer <s.hauer@pengutronix.de>
+    Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit f67066b6b0740b826ed862615c5ab022aaf4779a
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Sun Oct 18 20:43:14 2009 -0400
+
+    envcrc: check return value of fwrite()
+
+    Newer toolchains will often complain about unchecked fwrite():
+	envcrc.c:117: warning: ignoring return value of `fwrite´, declared
+		with attribute warn_unused_result
+
+    So check the return value to silence the warnings.
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit efd988ebaa241bab265b1511052350207cb7aaa0
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Mon Oct 19 09:18:57 2009 +0200
+
+    mcc200: fix build error
+
+    Fix compile error:
+    include/configs/mcc200.h:401:6: error: #elif with no expression
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 4e0539d2696992a5e32643a0c831e870cfe9a036
+Author: Nishanth Menon <nm@ti.com>
+Date:	Tue Oct 13 12:47:39 2009 -0400
+
+    OMAP3: fix warnings when NAND/ONENAND is not used
+
+    Fix build warnings by putting specific used variables
+    under required #ifdefs for removing:
+    mem.c:227: warning: unused variable 'f_sec'
+    mem.c:226: warning: unused variable 'f_off'
+    mem.c:225: warning: unused variable 'size'
+    mem.c:224: warning: unused variable 'base'
+    mem.c:222: warning: unused variable 'gpmc_config'
+
+    Signed-off-by: Nishanth Menon <nm@ti.com>
+
+commit 73db0c71da365a2d101878ae3aeb8ff3545a1828
+Author: Nishanth Menon <nm@ti.com>
+Date:	Tue Oct 13 12:47:24 2009 -0400
+
+    OMAP3: export enable_gpmc_cs_config to board files
+
+    Export enable_gpmc_cs_config into common header to
+    prevent warning:
+
+    warning: implicit declaration of function 'enable_gpmc_cs_config'
+
+    Signed-off-by: Nishanth Menon <nm@ti.com>
+
+commit 96a27c6dc29abf11740632ecd8ccab607b209c5d
+Author: Tom Rix <Tom.Rix@windriver.com>
+Date:	Mon Oct 12 12:07:40 2009 -0400
+
+    Zoom2 Fix serial gpmc setup
+
+    The offset to the chip select is incorrect.
+
+    The change 187af954cf7958c24efcf0fd62289bbdb4f1f24e,
+
+    omap3: embedd gpmc_cs into gpmc config struct
+
+    introduced a problem with the serial gpmc setup.
+
+    This patch reverts the chip select to its previous value.
+
+    The symptoms of this problem are that the Zoom2
+    currently hangs.
+
+    This was run tested on Zoom2.
+
+    Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
+
+commit 64d945abe8cffbacdaeca5f63b9b84f895d2d9ab
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date:	Sun Oct 11 09:10:27 2009 -0400
+
+    TI DaVinci Sonata: Add Config option for 64 bit Support
+
+    Adding the CONFIG_SYS_64BIT_VSPRINTF fot the DM644x based Sonata
+    Without this option enabled while performing NAND operations we will get
+    wrong diagnostic messages.
+    Example if the MTD NAND driver find a bad block while erasing from
+    a certain address, it will say bad block skipped at 0x00000000.
+
+    Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 54aa603d2ce1d9374a1f5c6336362037ad2d8b51
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date:	Sun Oct 11 09:14:58 2009 -0400
+
+    TI DaVinci DVEVM: Add Config option for 64 bit Support
+
+    Adding the CONFIG_SYS_64BIT_VSPRINTF in the DVEVM config.
+    Without this option enabled while performing NAND operations we will get
+    wrong diagnostic messages.
+    Example if the MTD NAND driver find a bad block while erasing from
+    a certain address, it will say bad block skipped at 0x00000000.
+
+    Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit b8d0aa0c78b8c0fa51acada3c486b81085924b53
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date:	Sat Oct 10 10:19:20 2009 -0400
+
+    TI DaVinci DM365: Add Config option for 64 bit Support
+
+    Adding the CONFIG_SYS_64BIT_VSPRINTF in the DM365 EVM config.
+    Without this option enabled while performing NAND operations we will get
+    wrong diagnostic messages.
+    Example if the MTD NAND driver find a bad block while erasing from
+    a certain address, it will say bad block skipped at 0x00000000.
+
+    Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 86a725b9c8b829c217be90e590f3ca2c91fa1dca
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date:	Sat Oct 10 10:18:46 2009 -0400
+
+    TI DaVinci DM355: Add Config option for 64 bit Support
+
+    Adding the CONFIG_SYS_64BIT_VSPRINTF in the DM355 EVM config.
+    Without this option enabled while performing NAND operations we will get
+    wrong diagnostic messages.
+    Example if the MTD NAND driver find a bad block while erasing from
+    a certain address, it will say bad block skipped at 0x00000000.
+
+    Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 9c44ddccb6602f620fc037974f3e4468ad8a7c0c
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date:	Wed Sep 9 11:50:40 2009 -0400
+
+    TI: OMAP3: Remove SZ_xx references
+
+    This patch removes dependency on the sizes.h header file
+    and removes all references to SZ_xx.
+
+    Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 13d2cb988ff07addce6e10ab2cb8965a9dd23c63
+Author: Steve Sakoman <sakoman@gmail.com>
+Date:	Sat Oct 10 14:29:37 2009 -0400
+
+    OMAP3: Update Overo and Beagle environment
+
+    Update default environment to support new kernel DSS2 subsystem and
+    simplify rootfs type and location changes.
+
+    Signed-off-by: Steve Sakoman <sakoman@gmail.com>
+    Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
+
+commit c73607c5525c6957c815e64f7e865fdd3baffe98
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date:	Sat Oct 10 13:46:26 2009 -0400
+
+    TI DaVinci: Maintainer for DM355 and DM365 EVM
+
+    Adding entries to the MAINTAINERS directory for the
+    DM355 and DM365 EVM.
+
+    Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 5df65cf56aeef9fdeab83a259c37aa7d23836dd3
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date:	Sat Oct 10 13:37:10 2009 -0400
+
+    TI: DaVinci: DM355 Leopard board support
+
+    This patch adds support for the leopard board which is
+    based on the DM355 SOC.
+
+    Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 6ab176d7091d21960a1bd89fcb7fd87b9e91aca1
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date:	Sat Oct 10 12:00:47 2009 -0400
+
+    TI DaVinci DM646x: Adding initial support for DM6467 EVM
+
+    This patch adds the initial support for DM6467 EVM.
+    Other features like NET and NAND support will be added as follow up patches.
+
+    Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit d884f64a7b8482f6c9688600e0a4731fa5678e0c
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date:	Thu Oct 1 20:22:09 2009 -0400
+
+    TI DaVinci DM365: Fix Compilation warning for DM365 EVM
+
+    This patch fixes a compilation warning while compiling
+    the DM365 EVM.
+
+    Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 6fe5e87be4b944edf428835210056e020c8bb794
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date:	Thu Oct 1 20:21:13 2009 -0400
+
+    TI DaVinci DM355: Fix Compilation warning for DM355 EVM
+
+    This patch fixes a compilation warning while compiling
+    the DM355 EVM.
+
+    Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 513bbe1b1720682e6de0aba2d9db5e60f3a428bb
+Author: Eric Benard <eric@eukrea.com>
+Date:	Mon Oct 12 10:15:39 2009 +0200
+
+    AT91 CPUAT91 Fix compiler warning
+
+    This change fixes the compiler warning
+
+    main.c: In function 'abortboot':
+    main.c:122: warning: too few arguments for format
+
+    Signed-off-by: Eric Benard <eric@eukrea.com>
+    Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
+
+commit b1e81f701d044eee3884202b127d5d1f0668bdb9
+Author: Eric Benard <eric@eukrea.com>
+Date:	Mon Oct 12 10:15:40 2009 +0200
+
+    AT91 CPU9260 CPU9G20 Fix compile warnings
+
+    This change fixes the compiler warning
+
+    nand_util.c:45:2: warning: #warning Please define CONFIG_SYS_64BIT_VSPRINTF
+      for correct output!
+
+    Signed-off-by: Eric Benard <eric@eukrea.com>
+    Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
+
+commit 94d50c527a3cedb6a41fbe6773256cdd1855317f
+Author: Eric Benard <eric@eukrea.com>
+Date:	Mon Oct 12 10:08:20 2009 +0200
+
+    AT91 CPU9260 Fix machine ID when using a CPU9G20.
+
+    Signed-off-by: Eric Benard <eric@eukrea.com>
+    Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
+
+commit 8c0a92c8f4cf399e873c2611939f3617983785a9
+Author: Alessandro Rubini <rubini@unipv.it>
+Date:	Sat Oct 10 11:51:26 2009 +0200
+
+    lcd: remove '#if 0' 32-bit scroll, now memcpy does it
+
+    Signed-off-by: Alessandro Rubini <rubini@unipv.it>
+    Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
+
+commit e3ea948d4588e7efddbf0ee92147d93f827d7cea
+Author: Alessandro Rubini <rubini@unipv.it>
+Date:	Sat Oct 10 11:51:16 2009 +0200
+
+    lib_generic memset: fill one word at a time if possible
+
+    If the destination is aligned, fill ulong values until possible.
+    Then fill remaining part by byte.
+
+    Signed-off-by: Alessandro Rubini <rubini@unipv.it>
+    Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
+    Acked-by: Mike Frysinger <vapier@gentoo.org>
+
+commit ecd830b863e5c6ac5d804d3b3a92453a98d526fc
+Author: Alessandro Rubini <rubini@unipv.it>
+Date:	Sat Oct 10 11:51:05 2009 +0200
+
+    lib_generic memcpy: copy one word at a time if possible
+
+    If source and destination are aligned, this copies ulong values
+    until possible, trailing part is copied by byte. Thanks for the details
+    to Wolfgang Denk, Mike Frysinger, Peter Tyser, Chris Moore.
+
+    Signed-off-by: Alessandro Rubini <rubini@unipv.it>
+    Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
+    Acked-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 9c5586aa19bbedf290d2a663813404d2db87dfa5
+Author: Alessandro Rubini <rubini@unipv.it>
+Date:	Thu Oct 8 14:29:14 2009 +0200
+
+    setenv: do console redirection even if previously unset
+
+    If "stdout" is not previously set, doing "setenv stdout lcd" had no
+    effect, since console redirection only worked if the environment
+    variable was already set; the second time you run setenv it worked.
+    Most default environments lack stdin/out/err definitions, so I'm sure
+    I'm not alone with this problem.
+
+    This patch simply moves a block of code out of a conditional, to do
+    the same work even if the variable was previously unset.
+
+    Signed-off-by: Alessandro Rubini <rubini@unipv.it>
+    Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
+
+commit c9ee39972a7758e883b73c6c0e3c3a14cd5b2f43
+Author: Martha Stan <mmarx@silicontkx.com>
+Date:	Wed Oct 7 04:38:46 2009 -0400
+
+    mpc512x: fix System Clock Control constants for USB1 & USB2
+
+    Signer-off-by: Martha Stan <mmarx@silicontkx.com>
+
+commit 87b22b7787f397fc3daad570d711e478b1a7d253
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date:	Fri Oct 2 18:18:33 2009 -0400
+
+    mem_mtest: fix error reporting, allow escape with ^C
+
+    The basic memtest function tries to watch for ^C after each
+    pattern pass as an escape mechanism, but if things are horribly
+    wrong, we'll be stuck in an inner loop flooding the console with
+    error messages and never check for ^C.  To make matters worse,
+    if the user waits for all the error messages to complete, we
+    then incorrectly report the test passed without errors.
+
+    Adding a check for ^C after any error is printed will give
+    the end user an escape mechanism from a console flood without
+    slowing down the overall test speed on a slow processor.
+
+    Also, the more extensive memtest quit after just a single error,
+    which is inconsistent with the normal memtest, and not useful if
+    if you are doing dynamic environmental impact testing, such as
+    heating/cooling etc.
+
+    Both tests now track the error count and report it properly
+    at test completion.
+
+    Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+    Acked-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 9f4a420663419dc13f08a0ce65b93033c6172c69
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Thu Oct 1 12:11:54 2009 -0400
+
+    new default shortcut to config & build a board
+
+    The majority of the time that I build things in U-Boot, I want to just
+    build for the board.  I don't make board config tweaks after selecting the
+    board.  So add a new pattern rule that allows people to combine two steps
+    in one go:
+	`make foo_config && make` => `make foo`
+
+    This shouldn't conflict with any existing make rules as the pattern rule
+    is used only the rule doesn't already exist.
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 6dab6add2d8ee80905234b326abc3de11be1d178
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Wed Sep 30 15:29:58 2009 -0400
+
+    env: only build env_embedded and envcrc when needed
+
+    The env code is protected by the ENV_IS_EMBEDDED define, so attempting to
+    compile the code when this isn't defined is pointless.  Now that the env
+    headers have unified around CONFIG_ENV_IS_EMBEDDED, convert the build
+    system to only build the env objects when this is enabled.	And now that
+    the env code is conditionally compiled, we can drop the source code checks.
+
+    For people who want to extract the environment manually, add a new option
+    CONFIG_BUILD_ENVCRC that only enables the envcrc utility.
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 78f4ca7976748159080c9d920d5eb542d1b32d4f
+Author: Daniel Mack <daniel@caiaq.de>
+Date:	Mon Sep 28 11:40:38 2009 +0200
+
+    part_dos: check status flags of partitions
+
+    Only read partitions which have 0x00 or 0x80 set in their status field.
+    All others are invalid.
+
+    Signed-off-by: Daniel Mack <daniel@caiaq.de>
+
+commit 45def0ab9d1dedcd2a73939aad8373f760498762
+Author: Eric Millbrandt <emillbrandt@coldhaus.com>
+Date:	Fri Sep 25 17:47:43 2009 -0500
+
+    galaxy5200: change cs1 configuration
+
+    Correct the chip select configuration for the nand flash chip select.
+
+    Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
+
+commit 7936b51165b519a16ecf3db302fb88df8b8b3b3d
+Author: Niklaus Giger <niklaus.giger@netstal.com>
+Date:	Wed Sep 23 08:12:14 2009 +0200
+
+    Cleanup: use constant
+
+    Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
+
+commit 7120c888101952b7e61b9e54bb42370904aa0e68
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date:	Mon Oct 12 11:06:19 2009 -0500
+
+    mpc83xx: mpc8313 - handle erratum IPIC1 (TSEC IRQ number swappage)
+
+    mpc8313e erratum IPIC1 swapped TSEC interrupt ID numbers on rev. 1
+    h/w (see AN3545).  The base device tree in use has rev. 1 ID numbers,
+    so if on Rev. 2 (and higher) h/w, we fix them up here.
+
+    Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+    Reviewed-by: Roland Lezuo <roland.lezuo@chello.at>
+
+commit 91525c67153fcf2c19b2fc8d9c6376ac1a019f52
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date:	Mon Oct 12 23:55:39 2009 +0400
+
+    mpc85xx: Fix booting on various boards
+
+    commit 0e870980a64584a591af775bb9c9fe9450124df9 ("8xxx: Removed
+    CONFIG_NUM_CPUS from 85xx/86xx") breaks U-Boot on various boards,
+    namely the ones that call get_sys_info() from board_early_init_f().
+
+    get_sys_info() calls cpu_numcores(), which depends on probecpu()
+    being called before. But probecpu() is called after board_early_init_f(),
+    and so cpu_numcores() returns random values, which in turn crashes
+    get_sys_info().
+
+    To fix the issue we place probecpu() before board_early_init_f()
+    in an initialization sequence.
+
+    Booting on the following boards should be revived now:
+     mpc8540ads
+     mpc8541cds
+     mpc8548cds
+     mpc8555cds
+     mpc8560ads
+     mpc8568mds
+     mpc8569mds
+     and maybe more.
+
+    Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 26df6aa9916443077139f8f008fbc5f414ba05e5
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date:	Fri Oct 2 18:48:07 2009 -0400
+
+    mpc86xx: delete unused MPC86xx_DDR_SDRAM_CLK_CNTL define
+
+    This is an orphaned legacy leftover that is just polluting
+    the config file namespace.
+
+    Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit fad15096e3b34927444ba5f6133742d40d78a425
+Author: Dipen Dudhat <dipen.dudhat@freescale.com>
+Date:	Thu Oct 8 13:33:29 2009 +0530
+
+    ppc/P1_P2_RDB: On-chip BootROM support
+
+    On Chip BootROM support for P1 and P2 series RDB platforms.
+
+    This patch is derived from latest On Chip BootROM support on MPC8536DS
+
+    Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit f7780ec977e545b83bc5068e0957d640f1d98f13
+Author: Dipen Dudhat <dipen.dudhat@freescale.com>
+Date:	Thu Oct 8 13:33:18 2009 +0530
+
+    ppc/P1_P2_RDB: NAND Boot Support
+
+    NAND Boot support for P1 and P2 series RDB platforms.
+
+    This patch is derived from NAND Boot support on MPC8536DS.
+
+    Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit d11823ca3cb551814ffcd926402c8bcf3a7eff35
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date:	Wed Oct 7 16:34:28 2009 -0400
+
+    mpc8xxx: improve LAW error messages when setting up DDR
+
+    When setting up the LAWs for the DDR, if there was an error,
+    you got the not-so-helpful error text "ERROR" and nothing
+    else.  Not only is it non-informative, but it is also
+    pretty frustrating trying to grep for "ERROR" in the source.
+
+    Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit a9946e3fc7089ddc6b7711a44e07a6b0827b79a7
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date:	Wed Sep 30 16:12:31 2009 -0400
+
+    sbc8641d: fix LAW so board doesn't hang on DDR init
+
+    All versions between now and since this commit:
+
+      commit bd76729bcbfd64b5d016a9b936f058931fc06eaf
+      MPC86xx: set CONFIG_MAX_MEM_MAPPED to 2G by default
+
+    will fail to allow the SBC8641D to get past DDR init, because the
+    LAW config was overlapping.  Eventually this board will do SPD
+    EEPROM config, but for now this gets the board working again.
+
+    Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 3d1988ab47cc0e265272967e07d747ec600a44c9
+Author: kevin.morfitt@fearnside-systems.co.uk <kevin.morfitt@fearnside-systems.co.uk>
+Date:	Sat Oct 10 13:34:09 2009 +0900
+
+    Clean-up of s3c24x0 nand driver
+
+    This patch re-formats the arm920t s3c24x0 nand driver in preparation for changes
+    to add support for the Embest SBC2440-II Board.
+
+    The changes are as follows:
+    - re-indent the code using Lindent
+    - make sure register layouts are defined using a C struct
+    - replace the upper-case typedef'ed C struct names with lower case
+    non-typedef'ed ones
+    - make sure registers are accessed using the proper accessor functions
+    - run checkpatch.pl and fix any error reports
+
+    It assumes the following patch has been applied first:
+    - [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009
+     - patches 1/4, 2/4 and 3/4 of this series
+
+    Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have
+    any s3c2400 or s3c2410 boards but need this patch applying before I can submit
+    patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400,
+    smdk2410 and trab configs to use the mtd nand driver (which isn't used by any
+    board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or
+    errors were found.
+
+    Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
+    Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
+
+commit eb0ae7f549b7142826a8bcdd2dc945fac9c36349
+Author: kevin.morfitt@fearnside-systems.co.uk <kevin.morfitt@fearnside-systems.co.uk>
+Date:	Sat Oct 10 13:33:11 2009 +0900
+
+    Clean-up of s3c24x0 drivers excluding nand driver
+
+    This patch re-formats the arm920t s3c24x0 driver files, excluding the nand
+    driver, in preparation for changes to add support for the Embest SBC2440-II Board.
+
+    The changes are as follows:
+    - re-indent the code using Lindent
+    - make sure register layouts are defined using a C struct
+    - replace the upper-case typedef'ed C struct names with lower case
+      non-typedef'ed ones
+    - make sure registers are accessed using the proper accessor functions
+    - run checkpatch.pl and fix any error reports
+
+    It assumes the following patch has been applied first:
+    - [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009
+    - patches 1/4 and 2/4 of this series
+
+    Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have
+    any s3c2400 or s3c2410 boards but need this patch applying before I can submit
+    patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400,
+    smdk2410 and trab configs to use the mtd nand driver (which isn't used by any
+    board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or
+    errors were found.
+
+    Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
+    Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
+
+commit 8250d0bae84229abea397f6b474b3556b0f04e80
+Author: kevin.morfitt@fearnside-systems.co.uk <kevin.morfitt@fearnside-systems.co.uk>
+Date:	Sat Oct 10 13:32:01 2009 +0900
+
+    Clean-up of s3c24x0 header files
+
+    This patch re-formats the arm920t s3c24x0 header files in preparation for
+    changes to add support for the Embest SBC2440-II Board.
+
+    The changes are as follows:
+    - re-indent the code using Lindent
+    - make sure register layouts are defined using a C struct
+    - replace the upper-case typedef'ed C struct names with lower case
+    non-typedef'ed ones
+    - make sure registers are accessed using the proper accessor functions
+    - run checkpatch.pl and fix any error reports
+
+    It assumes the following patch has been applied first:
+    - [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009
+    - patch 1/4 of this series
+
+    Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have
+    any s3c2400 or s3c2410 boards but need this patch applying before I can submit
+    patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400,
+    smdk2410 and trab configs to use the mtd nand driver (which isn't used by any
+    board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or
+    errors were found.
+
+    Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
+    Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
+
+commit d67cce2dda3a40c3bd90a6c6e129fbb26dd4cfab
+Author: kevin.morfitt@fearnside-systems.co.uk <kevin.morfitt@fearnside-systems.co.uk>
+Date:	Sat Oct 10 13:30:22 2009 +0900
+
+    Clean-up of cpu_arm920t and cpu_arm920t_s3c24x0 code
+
+    This patch re-formats the code in cpu/arm920t and cpu/arm920t/23c24x0 in
+    preparation for changes to add support for the Embest SBC2440-II Board.
+
+    The changes are as follows:
+    - re-indent the code using Lindent
+    - make sure register layouts are defined using a C struct
+    - replace the upper-case typedef'ed C struct names with lower case
+      non-typedef'ed ones
+    - make sure registers are accessed using the proper accessor functions
+    - run checkpatch.pl and fix any error reports
+
+    It assumes the following patch has been applied first:
+    - [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009
+
+    Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have
+    any s3c2400 or s3c2410 boards but need this patch applying before I can submit
+    patches for the SBC2440-II Board. Also, ran MAKEALL for all ARM9 targets and no
+    new warnings or errors were found.
+
+    Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
+    Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
+
+commit cd85662b345c0c2248fd7637f65bb2fbb4d53dd9
+Author: kevin.morfitt@fearnside-systems.co.uk <kevin.morfitt@fearnside-systems.co.uk>
+Date:	Sun Sep 6 00:33:13 2009 +0900
+
+    CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards
+
+    This sets CONFIG_SYS_HZ to 1000 for all boards that use the s3c2400 and
+    s3c2410 cpu's which fixes various problems such as the timeouts in tftp being
+    too short.
+
+    Tested on an Embest SBC2440-II Board with local u-boot patches as I don't
+    have any s3c2400 or s3c2410 boards but need this patch applying before I can
+    submit patches for the SBC2440-II Board. Also, ran MAKEALL for all ARM9 targets
+    and no new warnings or errors were found.
+
+    It was originally submitted on 21/06/2009 but didn't get into the 2009.08
+    release, and Jean-Pierre made one comment on the original patch (see
+    http://lists.denx.de/pipermail/u-boot/2009-July/055470.html). I've made two
+    changes to the original patch:
+    - it's been re-based to the current release
+    - I've re-named get_timer_raw() to get_ticks() in response to Jean-Pierre's comment
+
+    This affects the sbc2410, smdk2400, smdk2410 and trab boards. I've copied it
+    directly to the maintainers of all except the sbc2410 which doesn't have an
+    entry in MAINTAINERS.
+
+    Signed-off-by: Kevin Morfitt <kmorfitt@aselaptop-1.localdomain>
+    Tested-by: Wolfgang Denk <wd@denx.de>
+    Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
+
+commit 8bc4ee9e8213abe4031ea1720aa02fa98d4402ad
+Author: Minkyu Kang <mk7.kang@samsung.com>
+Date:	Thu Oct 1 17:20:40 2009 +0900
+
+    s5pc1xx: add support SMDKC100 board
+
+    Adds new board SMDKC100 that uses s5pc100 SoC
+
+    Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
+    Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com>
+
+commit dd2c9e6a3b67c8ff56694e515e6e3c7baddd8f52
+Author: Minkyu Kang <mk7.kang@samsung.com>
+Date:	Thu Oct 1 17:20:28 2009 +0900
+
+    s5pc1xx: support serial driver
+
+    This patch includes the serial driver for s5pc1xx.
+    s5pc1xx uart driver needs own register setting and clock configuration.
+    So, need to special driver.
+
+    Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
+
+commit 4678d674f0cacc983dca7f6b9933cd8291c9797c
+Author: Minkyu Kang <mk7.kang@samsung.com>
+Date:	Thu Oct 1 17:20:08 2009 +0900
+
+    s5pc1xx: support onenand driver
+
+    This patch includes the onenand driver for s5pc100
+
+    Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
+    Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
+
+commit 399e5ae0d0b2eb4663fc5784201968c07d45afac
+Author: Minkyu Kang <mk7.kang@samsung.com>
+Date:	Thu Oct 1 17:20:01 2009 +0900
+
+    s5pc1xx: support Samsung s5pc1xx SoC
+
+    This patch adds support for the Samsung s5pc100 and s5pc110
+    SoCs. The s5pc1xx SoC is an ARM Cortex A8 processor.
+
+    Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
+    Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com>
+
+commit d087d19a994e741f0ce526124be117c90be482ae
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Tue Oct 13 21:58:26 2009 -0400
+
+    Blackfin: drop MAC display at boot
+
+    The default Blackfin boot would display the MAC address for the first NIC,
+    but this relies on the environment.  The current net multi stack no longer
+    writes the default hardware settings to the environment, so most of the
+    time the display shows all zeros.  This can be pretty confusing and really
+    doesn't add anything useful, so just drop it.
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 1f003cf4738a199d99c818124784058526d2d40e
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Fri Oct 9 02:24:33 2009 -0400
+
+    Blackfin: reset watchdog in udelay()
+
+    All arches apparently should reset the watchdog in their udelay loop as
+    noted on the mailing list recently:
+
+      > A comment in flash_status_check() suggests that udelay() is
+      > expected to reset the watchdog, but I can't find any architecture
+      > where it does.
+
+      If this is missing in other architectures, it should be fixed at the
+      root cause, i. e. in udelay() or in the respective support routines.
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 370ec734557d0b0f266e6d0953229ee12cae5edd
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Fri Oct 9 02:22:11 2009 -0400
+
+    Blackfin: Remove relocation fixups
+
+    Blackfin pieces like commit 0630535e2d062dd73c1ceca5c6125c86d1127a49.
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit a380279b2abe130c2d3d2c8de36f8ff98bc6b3b0
+Author: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
+Date:	Tue Sep 29 08:03:12 2009 +0200
+
+    at91: Update MEESC board support
+
+    This patch implements several updates:
+    -disable CONFIG_ENV_OVERWRITE
+    -add new hardware style variants and set the arch numbers appropriate
+    -pass the serial# and hardware revision to the kernel
+    -removed unused macros from include/configs/meesc.h
+    -fixed multiline comment style
+
+    Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
+
+commit 9df20ce211576aa7ac75710dcd8d0a6236abfd70
+Author: Simon Kagstrom <[simon.kagstrom@netinsight.net]>
+Date:	Thu Oct 1 19:41:50 2009 +0530
+
+    arm: Correct build with CONFIG_SYS_HUSH_PARSER set
+
+    FLAG_PARSE_SEMICOLON is not defined without hush.h, so include that.
+
+    Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
+    Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
+
+commit df3826262c0efd2baec4df23d44b3942af98f5a7
+Author: Olof Johansson <olof@lixom.net>
+Date:	Tue Sep 29 10:22:45 2009 -0400
+
+    TI: OMAP3: Overo Tobi ethernet support
+
+    Add setup for ethernet on Tobi, allowing kernel/ramdisk to be loaded
+    over tftp.
+
+    This also refactors the smc911x driver to allow for detecting when the
+    chip is missing. I.e. the detect_chip() function is called earlier and
+    will abort gracefully when the Chip ID read returns all 1's.
+
+    Signed-off-by: Olof Johansson <olof@lixom.net>
+    Acked-by: Dirk Behme <dirk.behme@googlemail.com>
+    Acked-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 2a6cc97b91997ae485312ac91ffbcea6a89b663a
+Author: Olof Johansson <olof@lixom.net>
+Date:	Tue Sep 29 10:21:29 2009 -0400
+
+    SMC911X: Add chip auto detection
+
+    Refactor the smc911x driver to allow for detecting when the chip is missing.
+    I.e. the detect_chip() function is called earlier and will abort gracefully
+    when the Chip ID read returns all 1's.
+
+    Signed-off-by: Olof Johansson <olof@lixom.net>
+    Acked-by: Dirk Behme <dirk.behme@googlemail.com>
+    Acked-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 0297ec7e2a4039b8a28346f52f3ccca4db1ddc62
+Author: Tom Rix <Tom.Rix@windriver.com>
+Date:	Tue Sep 29 10:19:49 2009 -0400
+
+    TI OMAP3 Use arm init sequence to initialize i2c
+
+    This changes fixes an early i2c error.
+
+    It appears that I2C is working because once a read or write
+    error is detected, the omap24xx_i2c driver calls i2c_init
+    inside its error handling check.
+
+    While it is ok to attempt error handling this way, the boards
+    must not depend on this side effect to initialize it's i2c.
+
+    Instead of explicitly calling i2c_init for every board, use
+    the generic arm initialization in lib_arm/board.c. By defining
+    the config variable CONFIG_HARD_I2C, the omap3 i2c initialization
+    is included in the init_sequence table.
+
+    Run tested on Beagle.
+    Compile tested on the omap3's
+
+    Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
+    Acked-by: Dirk Behme <dirk.behme@googlemail.com>
+
+commit 4df30f3bb7285b2c962713a5c693c16fd90885e0
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date:	Tue Sep 29 09:43:04 2009 -0400
+
+    TI: DaVinci DM365: Enabling network Support on DM365 EVM
+
+    This patch enables EMAC on the DM365 EVM.
+
+    Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+    Acked-by: Tom Rix <Tom.Rix@windriver.com>
+
+commit 00e1665a3cf956e09ac2ce86ef6ec459f6bfb33c
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date:	Tue Sep 29 10:02:38 2009 -0400
+
+    TI: DaVinci: GPIO header file and definitions
+
+    Some DaVinci SOC's use GPIOs to enable EMAC and DM9000.
+    This patch adds some definitions for GPIO registers and also adds
+    structures for GPIO.
+    A separate header file is being added so that in future we
+    can have a DaVinci GPIO driver similer to OMAP.
+
+    Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+    Acked-by: Tom Rix <Tom.Rix@windriver.com>
+
+commit 95ae803afbdd9f673c94b992ea624a10d252afc2
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date:	Fri Sep 18 17:30:05 2009 -0400
+
+    TI: DaVinci DM646x: Update flag used to represent DM646x SOC's
+
+    In the DaVinci specific code, we use both CONFIG_SOC_DM646X and
+    CONFIG_SOC_DM646x to represent DM646x specific code.
+    This patch changes occurrences of CONFIG_SOC_DM646x to
+    CONFIG_SOC_DM646X. This is because for DM644x series of SOCs we use
+    the flag CONFIG_SOC_DM644X. We want some uniformity.
+
+    Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+    Acked-by: Tom Rix <Tom.Rix@windriver.com>
+
+commit fc9165fdb3b021aa8ff02417692220fe9344072b
+Author: Olof Johansson <olof@lixom.net>
+Date:	Mon Sep 28 08:19:30 2009 -0400
+
+    OMAP3: Clean up whitespace in mux configs
+
+    Switch from space-based indentation to tab-based in mux configs, as pointed
+    out by WD at:
+
+    http://lists.denx.de/pipermail/u-boot/2009-September/061241.html
+
+    Nothing but whitespace changes in this patch (diff -w gives no output).
+
+    Signed-off-by: Olof Johansson <olof@lixom.net>
+
+commit 9de0212bd7c4c82a7e8c2a2c8714f8c7abc57d08
+Author: Dirk Behme <dirk.behme@googlemail.com>
+Date:	Mon Sep 28 08:17:50 2009 -0400
+
+    OMAP3 MMC: Fix warning dereferencing type-punned pointer
+
+    Fix warning
+    Dereferencing type-punned pointer will break strict-aliasing rules
+
+    Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
+    CC: Steve Sakoman <sakoman@gmail.com>
+    Acked-by: Tom Rix <Tom.Rix@windriver.com>
+
+commit e92daeb5c2050438402b87c7d614e8a13c294348
+Author: Simon Kagstrom <[simon.kagstrom@netinsight.net]>
+Date:	Tue Sep 22 04:01:01 2009 +0530
+
+    Support for the OpenRD base board
+
+    The implementation is borrowed from the sheevaplug board and the Marvell
+    1.1.4 code. Unsupported (or untested) is the SD card, PCIe and SATA.
+
+    Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
+
+commit a62e78fc444c67f958be48891bef3dab0e9eb285
+Author: Prafulla Wadaskar <prafulla@marvell.com>
+Date:	Mon Sep 21 20:15:17 2009 +0530
+
+    Kirkwood: mv88f6281gtw_ge: Add kwbimage build support
+
+    This patch adds kwbimage configuration file
+    (used by mkimage utility)
+    to support u-boot.kwb target on mv88f6281gtw_ge board.
+
+    To create Kirkwood boot image to be flashed on SPI Flash,
+    additional parameter u-boot.kwb need to be passed during make.
+
+    Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
+
+commit 5bc7cbc15b1890682c0b279f708914518bd25f8d
+Author: Prafulla Wadaskar <prafulla@marvell.com>
+Date:	Mon Sep 21 18:23:11 2009 +0530
+
+    Kirkwood: rd6281a: Add kwbimage build support
+
+    This patch adds kwbimage configuration file
+    (used by mkimage utility)
+    to support u-boot.kwb target on rd6281a platform.
+
+    To create Kirkwood boot image to be flashed on NAND,
+    additional parameter u-boot.kwb need to be passed during make.
+
+    Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
+
+commit 23b80982a02a43bf4ead91574c9d6f1b647ccc8f
+Author: Tom Rix <Tom.Rix@windriver.com>
+Date:	Sun Sep 27 11:10:09 2009 -0500
+
+    Add support for Eukrea CPU9260/CPU9G20 SBC
+
+    these boards are built around Atmel's AT91SAM9260/9G20 and have
+    up to 64MB of NOR flash, up to 128MB of SDRAM, up to 2GB of NAND
+    and include a 10/100 Ethernet PHY in RMII mode.
+
+    Signed-off-by: Eric Benard <eric@eukrea.com>
+    Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
+
+commit d8380c9d35e88759c96e68a03738446ca0cb292f
+Author: Tom Rix <Tom.Rix@windriver.com>
+Date:	Sun Sep 27 07:47:24 2009 -0500
+
+    Add support for Eukrea CPUAT91 SBC
+
+    CPUAT91 is built around Atmel's AT91RM9200 and has up to 16MB of NOR
+    flash, up to 128MB of SDRAM, and includes a Micrel KS8721 PHY in RMII
+    mode.
+
+    Signed-off-by: Eric Benard <eric@eukrea.com>
+    Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
+
+commit eb95aa15e644c29b01832703aa4964fe419170f0
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date:	Mon Sep 14 14:57:47 2009 -0400
+
+    TI: DaVinci DM365: Minor config cleanup
+
+    The DM365 config was using the 'CONFIG_CMD_SAVEENV' flag.
+    This is already included when we include the
+    config_cmd_default.h header file. So this flag is removed.
+    Also another flag to enable NAND functions was being
+    enabled incorrectly.
+
+    Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 5d783c1ffd691ffdadbc2c2f796c41481b7cdce7
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date:	Mon Sep 14 15:03:06 2009 -0400
+
+    TI DaVinci DM365: Removing header file which does not exist
+
+    The DaVinci DM365 EVM board specific code was including a header file
+    which does not exist. So removing this header file.
+
+    Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 409ec37bd8ae8822d276e77419d899571891b191
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date:	Tue Sep 8 18:08:06 2009 -0400
+
+    TI DaVinci: DM355: Config Cleanup and Update
+
+    This patch does the following
+    1) Enables the NAND driver which is now available.
+    2) Enables the 'CONFIG_MTD_DEVICE' as without this the
+    compilation will fail
+    3) We now have a safe place to store environment and defines
+    an offset where this can be stored. This offset value is such that it is after
+    the location where U-Boot is flashed using TI flash utilities.
+    4) Enables Bootdelay
+    5) Increases malloc() arena size. Manufacturers are coming out with
+    NAND with large blocks sizes of upto 1 MiB. It has been noticed that
+    as the block size of the NAND used is increased, if this particular
+    value is not increased, the NAND driver will output out of memory
+    errors.
+
+    Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 7908c97a106765ad8816bf2271a5bf315728b274
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date:	Tue Sep 8 11:37:39 2009 -0400
+
+    TI DaVinci: DM646x: Initial Support for DM646x SOC
+
+    DM646x is an SOC from TI which has both an ARM and a DSP.
+    There are multiple variants of the SOC mainly dealing with different
+    core speeds.
+    This patch adds the initial framework for the DM646x SOC.
+
+    Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 5d0f53624c24eaf82d58368a6a5b8476392dd5c7
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date:	Wed Sep 9 15:26:00 2009 -0400
+
+    TI DaVinci: DM6446: Fix Compilation error in NAND mode
+
+    The Default mode that is built for the Davinci DVEVM happens
+    to be the NOR mode.
+    When we want to build for the NAND mode, we get a compilation
+    error. This is overcome by defining the CONFIG_MTD_DEVICE
+    flag in the NAND mode.
+    The image built for NAND mode was successfully tested on the
+    DaVinci DM6446 EVM.
+
+    Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 7a2aa8b68120f333ed2edc33475ca195810d6cb1
+Author: Tom Rix <Tom.Rix@windriver.com>
+Date:	Thu Sep 10 15:27:57 2009 -0400
+
+    OMAP3 Move cache routine to cache.S
+
+    v7_flush_dcache_all, because it depends on omap ROM code is not
+    generic.  Rename the function to 'invalidate_dcache' and move it
+    to the omap cpu directory.
+
+    Collect the other omap cache routines l2_cache_enable and
+    l2_cache_disable with invalide_dcache into cache.S.  This
+    means removing the old cache.c file that contained l2_cache_enable
+    and l2_cache_disable.
+
+    The conversion from cache.c to cache.S was done most through
+    disassembling the uboot binary.  The only significant change was
+    to change the comparision for the return of get_cpu_rev from
+
+       cmp	r0, #0
+       beq	earlier_than_label
+
+    Which was lost information to
+
+       cmp	r0, #CPU_3XX_ES20
+       blt	earlier_than_label
+
+    The paths through the enable routine were verified by
+    adding an infinite loop and seeing the hang.  Then
+    removing the infinite loop and seeing it continue.
+
+    The disable routine is similar enough that it was not
+    tested with this method.
+
+    Run tested by cold booting from nand on beagle and zoom1.
+    Compile tested on MAKEALL arm.
+
+    Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
+
+commit a16df2c11188297eca43cf6080c70fb69b960232
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date:	Tue Sep 8 17:09:52 2009 -0400
+
+    TI DaVinci: Remove references to SZ_xx
+
+    This patch removes the asm/sizes.h header file from being
+    included in the DaVinci SOC configs.
+    References to SZ_xx have been replaced by appropriate
+    bit shifted values.
+
+    Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+    Acked-by: Wolfgang Denk <wd@denx.de>
+
+commit 285870f75378aca41c5063e4358ad93bf3014fd8
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date:	Thu Oct 9 01:27:18 2008 -0500
+
+    Leave x86emu op code tables in default section
+
+    Forcing the tables into got2 caused extra relocation when using -mrelocatable.
+    This patch requires any board defining CONFIG_BIOSEMU to use -mrelocatable.
+
+    Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+    Acked-by: Jin Zhengxiong <Jason.Jin@freescale.com>
+
+commit be2254423b86572841aa70ff05d20933d1b49823
+Author: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
+Date:	Sat Oct 10 12:42:22 2009 +0200
+
+    Update all board to support new bbmiiphy driver (with multibus support)
+
+    Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
+    Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 310cecb8ccdbc8a9be580e75b2fd362179d78535
+Author: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
+Date:	Sat Oct 10 12:42:21 2009 +0200
+
+    Add bb_miiphy_init call before any ethernet bring-up code.
+
+    Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
+    Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 4ba31ab33ac824635fcb49ac609070a9ebcab7f0
+Author: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
+Date:	Sat Oct 10 12:42:20 2009 +0200
+
+    Rewrite the miiphybb (Bit-banged MII bus driver) in order to support an arbitrary number of mii buses.
+
+    This feature is useful when your board uses different mii buses for different
+    phys and all (or a part) of these buses are implemented via bit-banging mode.
+
+    The driver requires that the following macros should be defined into the board
+    configuration file:
+
+    CONFIG_BITBANGMII	    - Enable the miiphybb driver
+    CONFIG_BITBANGMII_MULTI - Enable the multi bus support
+
+    If the CONFIG_BITBANGMII_MULTI is not defined, the board's config file needs
+    to define at least the following macros:
+
+    MII_INIT	  - Generic code to enable the MII bus (optional)
+    MDIO_DECLARE  - Declaration needed to access to the MDIO pin (optional)
+    MDIO_ACTIVE   - Activate the MDIO pin as out pin
+    MDIO_TRISTATE - Activate the MDIO pin as input/tristate pin
+    MDIO_READ	  - Read the MDIO pin
+    MDIO(v)	  - Write v on the MDIO pin
+    MDC_DECLARE   - Declaration needed to access to the MDC pin (optional)
+    MDC(v)	  - Write v on the MDC pin
+
+    The previous macros make the driver compatible with the previous version
+    (that didn't support the multi-bus).
+
+    When the CONFIG_BITBANGMII_MULTI is also defined, the board code needs to fill
+    the bb_miiphy_buses[] array with a record for each required bus and declare
+    the bb_miiphy_buses_num variable with the number of mii buses.
+    The record (struct bb_miiphy_bus) has the following fields/callbacks (see
+    miiphy.h for details):
+
+    char name[]		   - The symbolic name that must be equal to the MII bus
+			     registered name
+    int (*init)()	   - Initialization function called at startup time (just
+			     before the Ethernet initialization)
+    int (*mdio_active)()   - Activate the MDIO pin as output
+    int (*mdio_tristate)() - Activate the MDIO pin as input/tristate pin
+    int (*set_mdio)()	   - Write the MDIO pin
+    int (*get_mdio)()	   - Read the MDIO pin
+    int (*set_mdc)()	   - Write the MDC pin
+    int (*delay)()	   - Delay function
+    void *priv		   - Private data used by board specific code
+
+    The board code will look like:
+
+    struct bb_miiphy_bus bb_miiphy_buses[] = {
+     { .name = miibus#1, .init = b1_init, .mdio_active = b1_mdio_active, ... },
+     { .name = miibus#2, .init = b2_init, .mdio_active = b2_mdio_active, ... },
+     ...
+    int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) /
+			      sizeof(bb_miiphy_buses[0]);
+
+    Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
+    Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit efaf6f1bf6ebdd8f16b0d0c2960abe8d06f95af4
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date:	Fri Oct 2 18:54:20 2009 -0400
+
+    mpc83xx: cosmetic comment update relating to SPD EEPROM
+
+    commit 6d0f6bcf337c5261c08fabe12982178c2c489d76 did the big
+    rename of CFG_ macros to CONFIG_SYS macros.  But it missed
+    a couple of instances within comments.
+
+    Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+    Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit afc3ba0fc4195624e79e21244380ed7cc2fd6969
+Author: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+Date:	Thu Oct 8 02:03:51 2009 +0200
+
+    relocation: Do not relocate NULL pointers.
+
+    NULL is an absolute value and should not be relocated.
+    After this correction code like:
+     void weak_fun(void) __attribute__((weak));
+     printf("weak_fun:%p\n", weak_fun);
+    will still print null after relocation.
+
+    Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+
+commit 3beb40c2473f0dd373231c723d88c51e46ad96f7
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Wed Oct 7 11:45:00 2009 -0500
+
+    85xx: Ensure BSS segment isn't linked at address 0
+
+    When U-Boot is relocated from flash to RAM pointers are modified
+    accordingly.  However, pointers initialzed with NULL values should not
+    be modified so that they maintain their intended NULL value.  If the
+    BSS segment is linked at address 0 its address will not be
+    updated as necessary during relocation.
+
+    This is a temporary workaround.  The end goal is to add support to
+    U-Boot to dynamically locate the BSS at an arbitrary address at
+    runtime.  When the ability to fixup the BSS inteligently is
+    added, this workaround can be removed and the 85xx link script
+    can put the BSS at a fixed address at link time.
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 95c44ec485b46ffb43dbdaa299f1491a500fdadf
+Author: Detlev Zundel <dzu@denx.de>
+Date:	Wed Oct 7 16:38:05 2009 +0200
+
+    tqm5200: Correct comment and code in post_hotkeys_pressed.
+
+    This fixes the code and the comment according to the original intent of
+    doing an intensive memory test when PSC6_3 is pulled low on the STK52xx.
+    Notably PORT_CONFIG will be overridden with this correct code now,
+    so beware.
+
+    The original code only worked by coincidence depending on the PORT_CONFIG
+    setting from the header file.  The new code was tested to ensure that the
+    (undocumented) memory test still works on the STK52x.
+
+    Signed-off-by: Detlev Zundel <dzu@denx.de>
+    CC: Martin Krause <Martin.Krause@tqs.de>
+
+    Minor white-space cleanup.
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit da01f53404f99db185d196867af79371725d4683
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Sun Oct 4 22:56:08 2009 +0200
+
+    mpc512x: fix fixed_sdram() init code.
+
+    Commit 054197ba and later fixes used an array to initialize some of
+    the MDDRC parameters; however, the use of an array turned out to be a
+    bad idea as it was not possible to correlate structure entries to
+    array indices in readable and reliable way. Now we use a struct
+    instead, which makes this self-explanatory.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit dbcc357166bed20df13450e93a501f30b197efd1
+Author: Niklaus Giger <niklaus.giger@member.fsf.org>
+Date:	Sun Oct 4 20:04:22 2009 +0200
+
+    ppc4xx: respect 80-chars per line in ppc*.h files
+
+    After running checkstyle.pl on the three previous patches I noted that in
+    the *.h files there were a lot of long lines. This patch solves this problem.
+
+    Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 78d2a641371ec71cc3786b167a318c7b115fbb90
+Author: Niklaus Giger <niklaus.giger@member.fsf.org>
+Date:	Sun Oct 4 20:04:21 2009 +0200
+
+    ppc4xx: Rework cmd reginfo
+
+    The command "reginfo" got an overhaul for the ppc4xx. It dumps all the
+    relevant HW configuration registers (address, symbolic name, content).
+    This allows to easily detect errors in *.h files and changes in the HW
+    configuration.
+
+    Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit ddc922ff2c20ae0b7f9ce2df1ac28143e2f325bd
+Author: Niklaus Giger <niklaus.giger@member.fsf.org>
+Date:	Sun Oct 4 20:04:20 2009 +0200
+
+    ppc_4xx: Apply new HW register names
+
+    Modify all existing *.c files to use the new register names
+    as seen in the AMCC manuals.
+
+    Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit f80e61dcfe53fa3a5936659883415c9bd1b5a3d9
+Author: Niklaus Giger <niklaus.giger@member.fsf.org>
+Date:	Sun Oct 4 20:04:19 2009 +0200
+
+    ppc4xx: Cleanup some HW register names
+
+    Here you find all the changes in the include directory for new register names
+    and adapting other ones to the names used by AMCC in their manuals, e.g.
+    For 440EPx/GRPPC440EPx/GRX, Revision 1.15 – September 22, 2008
+    For PPC405GP Embedded Processor, Revision 1.02 – March 22, 2006
+
+    Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 56f14818f66c68a8b9e45925f29ceb974405ad48
+Author: Stefan Roese <sr@denx.de>
+Date:	Tue Oct 6 07:21:08 2009 +0200
+
+    ppc4xx: Add PPC405EX(r) Rev D support
+
+    Unfortunately some Rev D PPC405EX/405EXr PVR's are identical with older
+    405EX(r) parts. Here a list:
+
+    0x12911475 - 405EX Rev D with Security *and* 405EX Rev A/B witout Sec
+    0x12911473 - 405EX Rev D without Security *and* 405EXr Rev A/B with Sec
+
+    Since there are only a few older parts in the field, this patch now
+    changes the PVR's above to represent the new Rev D versions.
+
+    Signed-off-by: Stefan Roese <sr@denx.de>
+    Cc: Phong Vo" <pvo@amcc.com>
+
+commit 06dfaeef52a5f773ae4292432e3c74ff52ead316
+Author: Stefan Roese <sr@denx.de>
+Date:	Fri Oct 2 14:35:16 2009 +0200
+
+    ppc4xx: Fix msg "initialization as root-complex failed" upon PCIe scan
+
+    This message is printed upon PCIe bus scan, not only upon error, but also
+    if no PCIe device is detected at all. Since this is not an error, let's
+    remove this message in this case. We already have the message
+    "link is not up." if there is no PCIe device present.
+
+    Signed-off-by: Stefan Roese <sr@denx.de>
+    Acked-by: Wolfgang Denk <wd@denx.de>
+
+commit 54f5f056aa1daa3e39bad1c5c3fb43a72cdb9e84
+Author: Mike Nuss <mike@terascala.com>
+Date:	Mon Oct 5 12:33:28 2009 -0400
+
+    PPC4xx: Denali core: Fix incorrect DDR row bits
+
+    The SPD detection code for the Denali memory controller used on some
+    ppc4xx
+    processors incorrectly encodes DDR0_42. With certain memory
+    configurations,
+    this can cause the bootwrapper to incorrectly calculate the installed
+    memory
+    size, because the number of row bits is wrong. This patch fixes that
+    encoding.
+
+    Signed-off-by: Mike Nuss <mike@terascala.com>
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 99dbd4efd6d5ecc37d7e8f28b20d9be8c83055c7
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date:	Mon Oct 5 00:02:51 2009 -0700
+
+    Add information about return values of xxx_eth_register() in documentation
+
+    As discussed on mailing list, <0 indicates failure, >=0 indicates number
+    of interfaces found.
+
+    Also added blurb about private data
+
+    Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 1f1e774ec6242d4ea34e5cff57232deb5bb587e0
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Wed Sep 9 14:41:22 2009 -0400
+
+    document network driver framework
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+    Acked-by: Wolfgang Denk <wd@denx.de>
+    Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit aba8237257dd15b0e76cc517f0e741c0908ee0b9
+Author: Prafulla Wadaskar <prafulla@marvell.com>
+Date:	Wed Sep 9 15:59:19 2009 +0530
+
+    net: kirkwood_egiga.c: fixed build warning
+
+    if link up detection code is disabled through config option, it gives build warning.
+    This patch fixes the same
+
+    Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
+    Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 7194ab809532eeca3e2ee5dc12017cb901cc5842
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date:	Sun Oct 4 22:37:03 2009 -0700
+
+    Convert SMC91111 Ethernet driver to CONFIG_NET_MULTI API
+
+    All in-tree boards that use this controller have CONFIG_NET_MULTI
+    added
+    Also:
+      - changed CONFIG_DRIVER_SMC91111 to CONFIG_SMC91111
+      - cleaned up line lengths
+      - modified all boards that override weak function in this driver
+      - modified all eeprom standalone apps to work with new driver
+      - updated blackfin standalone EEPROM app after testing
+
+    Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 32e7f239dda8638377edb0d3e7ac269cabbafbe6
+Author: Prafulla Wadaskar <prafulla@marvell.com>
+Date:	Mon Sep 21 20:28:18 2009 +0530
+
+    net: phy: mv88e61xx.c : fixed build warning
+
+    following build warning was observed
+
+    mv88e61xx.c: In function ‘mv88e61xx_busychk’:
+    mv88e61xx.c:208: warning: dereferencing type-punned pointer will break strict-aliasing rules
+
+    This patch fixes the same
+    Patch tested for rd6281a board build
+
+    Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
+    Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit c0b46d8ead3c6c5b569c83544fd71b9d73356869
+Author: James Clough <james@rtetc.com>
+Date:	Thu Sep 10 09:11:50 2009 +0200
+
+    net: Fix problem with 405EZ ethernet interrupt
+
+    On 405EZ the RX-/TX-interrupts are coalesced into one IRQ bit in the
+    UIC. We need to acknowledge the RX-/TX-interrupts in the
+    SDR0_ICINTSTAT reg as well.
+
+    This problem was introduced with commit
+    d1631fe1 [ppc4xx: Consolidate PPC4xx UIC defines]
+
+    Signed-off-by: James Clough <james@rtetc.com>
+    Signed-off-by: Stefan Roese <sr@denx.de>
+    Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 91b469c95faf92435e3d5d78292ba78075a3c5ca
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Wed Sep 2 04:18:55 2009 -0400
+
+    net: add random_port() prototype
+
+    The random_port() is meant to be used by other net code, but without a
+    prototype, we get fun warnings like:
+    dns.c: In function 'DnsSend':
+    dns.c:89: warning: implicit declaration of function 'random_port'
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+    Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 3469424cb6d939c7aedf1e0efdec44a797c0a18c
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Mon Sep 21 11:20:37 2009 -0500
+
+    ppc: Remove reloc_off field from global_data structure
+
+    Now that proper relocation is supported, the reloc_off field is no longer
+    necessary.
+
+    Note that the location of the standalone application jump table pointer
+    in the global data structure is affected by this change, breaking
+    execution of standalone applications compiled for previous versions of
+    U-Boot.
+
+    We therefore increment XF_VERSION to 6
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 0630535e2d062dd73c1ceca5c6125c86d1127a49
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Tue Sep 22 09:27:55 2009 -0500
+
+    arm/microblaze/nios/nios2/sh: Remove relocation fixups
+
+    These architectures don't need relocation fixups, so reduce their
+    codesize a bit by defining CONFIG_RELOC_FIXUP_WORKS.
+
+    Also remove the reloc_off field from their global data structures
+    as it is no longer needed.
+
+    Note that the location of the standalone application jump table pointer
+    in the global data structure is affected by this change, breaking
+    execution of standalone applications compiled for previous versions of
+    U-Boot. We will therefore increment XF_VERSION in the next commit,
+    which also touches this area.
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 521af04d853361b49344b61892eb0618f9f713c5
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Mon Sep 21 11:20:36 2009 -0500
+
+    Conditionally perform common relocation fixups
+
+    Add #ifdefs where necessary to not perform relocation fixups.  This
+    allows boards/architectures which support relocation to trim a decent
+    chunk of code.
+
+    Note that this patch doesn't add #ifdefs to architecture-specific code
+    which does not support relocation.
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 3cbcfa70b116df1bbdc90ba31c61adcaec058a8a
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Mon Sep 21 11:20:35 2009 -0500
+
+    p3mx: Remove serial relocation fixups
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 80f73b92a19129854876ec3f1aef531a09e86d2d
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Mon Sep 21 11:20:34 2009 -0500
+
+    lwmon, lwmon5: Remove sysmon POST relocation fixups
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 331ab60c4a418c39e5b1a05d4648a4155d0ad13e
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Mon Sep 21 11:20:33 2009 -0500
+
+    mpl: Remove memory test relocation fixups
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 6385b28116f775da4771b768ba9bf93c3aaaf26e
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Mon Sep 21 11:20:32 2009 -0500
+
+    fpga: Remove relocation fixups
+
+    PPC boards are the only users of the current FPGA code which is littered
+    with manual relocation fixups.  Now that proper relocation is supported
+    for PPC boards, remove FPGA manual relocation.
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit cd1011db80287eef933d1599b74cff1116c93134
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Mon Sep 21 11:20:31 2009 -0500
+
+    tsec: Remove PHY command relocation fixups
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit b5650c5d8c99100144d8e4e9af910405f857bb7a
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Mon Sep 21 11:20:30 2009 -0500
+
+    ppc: Remove board-specific command table relocation fixups
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit e6b05e774d7ce1641613cdeffb69c1d48139a869
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Mon Sep 21 11:20:29 2009 -0500
+
+    ppc: Remove extable relocation fixups
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit b32a894011b1436758905fa10e6a03b8539c43c9
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Mon Sep 21 11:20:28 2009 -0500
+
+    ppc: Remove pci config table pointer relocation fixups
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit a0e2066f392782730f0398095e583c87812d97f2
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Mon Sep 21 11:20:27 2009 -0500
+
+    ppc: Remove board.c relocation fixups
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 244615197469dd6fe75ae082f38424b97c79aeaf
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Mon Sep 21 11:20:26 2009 -0500
+
+    ppc: Check for compilers that don't support relocation
+
+    Certain ppc compilers are known not to generate the .fixup section
+    properly.  The .fixup section is necessary to create a relocatable
+    U-Boot image.  A basic check for the existence of the .fixup section
+    should hopefully catch the majority of broken compilers which don't
+    support relocation.
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 858290178f222d998b6425d85cf06822467918f3
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Mon Sep 21 11:20:25 2009 -0500
+
+    ppc: Enable full relocation to RAM
+
+    The following changes allow U-Boot to fully relocate from flash to
+    RAM:
+     - Remove linker scripts' .fixup sections from the .text section
+     - Add -mrelocatable to PLATFORM_RELFLAGS for all boards
+     - Define CONFIG_RELOC_FIXUP_WORKS for all boards
+
+    Previously, U-Boot would partially relocate, but statically initialized
+    pointers needed to be manually relocated.
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 3b4bd2d75c4b3c1a4570f47ffaaed66f56a78ff4
+Author: Matthias Fuchs <matthias.fuchs@esd.eu>
+Date:	Wed Sep 30 11:55:04 2009 +0200
+
+    ppc4xx: Add SDRAM detection for PMC440 boards
+
+    This patch adds support to detect the amount of DDR2 SDRAM
+    on PMC440 modules. Detection is done by probing through
+    a list of available and supported hardware configurations
+    from 1GByte down to 256MB.
+
+    The static TLB entry is replaced by dynamically created entries.
+
+    Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit fb95169e39f2d03270bed552d27bbb02627a443e
+Author: Stefan Roese <sr@denx.de>
+Date:	Mon Sep 28 17:33:45 2009 +0200
+
+    ppc4xx: Merge PPC4xx DDR and DDR2 ECC handling
+
+    This patch merges the ECC handling (ECC parity byte writing) into one
+    file (ecc.c) for all PPC4xx SDRAM controllers except for PPC440EPx/GRx.
+    This exception is because only those PPC's use the completely different
+    Denali SDRAM controller core.
+
+    Previously we had two routines to generate/write the ECC parity bytes.
+    With this patch we now only have one core function left.
+
+    Tested on Kilauea (no ECC) and Katmai (with and without ECC).
+
+    Signed-off-by: Stefan Roese <sr@denx.de>
+    Cc: Felix Radensky <felix@embedded-sol.com>
+    Cc: Grant Erickson <gerickson@nuovations.com>
+    Cc: Pieter Voorthuijsen <pv@prodrive.nl>
+
+commit d24bd2517a2b847f773453eab0ee5b1c8ebc74ba
+Author: Felix Radensky <felix@embedded-sol.com>
+Date:	Sun Sep 27 23:56:12 2009 +0200
+
+    ppc4xx: Reorganize DDR2 ECC handling
+
+    Reorganize DDR2 ECC handling to use common code for
+    SPD DIMMs and soldered SDRAM. Also, use common code
+    to display SDRAM info (ECC, CAS latency) for SPD and
+    soldered SDRAM variants.
+
+    Signed-off-by: Felix Radensky <felix@embedded-sol.com>
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 46a887949e11d2cddb91e17ca47e73341d71a379
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Wed Sep 30 03:09:16 2009 -0400
+
+    Blackfin: update default console= settings
+
+    The Linux kernel has changed the way it numbers serial ports, so update
+    the default command line to match it.
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 4c5f307d58604dea001cccf388aa077a902ab0a5
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Mon Sep 21 18:04:49 2009 -0400
+
+    Blackfin: bf533-ezkit: update env location
+
+    The u-boot image has outgrown the current space and overflowed into the
+    env sector.  So move the env to the next available sector (we've already
+    allocated the first few sectors anyways for u-boot).
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 24b17d8a3c3a4b9ceaf6363ebe0021011b0b8bd8
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Wed Sep 30 08:39:44 2009 -0500
+
+    ppc/85xx: get_law_entry isn't used in CONFIG_NAND_SPL
+
+    Don't include get_law_entry as part of the NAND_SPL build since the
+    code isnt used.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 693a048d8ac191181f5b9adbff642d3f1bbd479f
+Author: Mingkai Hu <Mingkai.hu@freescale.com>
+Date:	Wed Sep 23 15:20:39 2009 +0800
+
+    Add README.mpc8536ds
+
+    Add boot from NAND/eSDHC/eSPI description
+
+    Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit e40ac4870c6e72302044e98338322f45c34435bd
+Author: Mingkai Hu <Mingkai.hu@freescale.com>
+Date:	Wed Sep 23 15:20:38 2009 +0800
+
+    On-chip ROM boot: MPC8536DS support
+
+    The MPC8536E is capable of booting from the on-chip ROM - boot from
+    eSDHC and boot from eSPI. When power on, the porcessor excutes the
+    ROM code to initialize the eSPI/eSDHC controller, and loads the mian
+    U-Boot image from the memory device that interfaced to the controller,
+    such as the SDCard or SPI EEPROM, to the target memory, e.g. SDRAM or
+    L2SRAM, then boot from it.
+
+    The memory device should contain a specific data structure with control
+    word and config word at the fixed address. The config word direct the
+    process how to config the memory device, and the control word direct
+    the processor where to find the image on the memory device, or where
+    copy the main image to. The user can use any method to store the data
+    structure to the memory device, only if store it on the assigned address.
+
+    The on-chip ROM code will map the whole 4GB address space by setting
+    entry0 in the TLB1, so the main image need to switch to Address space 1
+    to disable this mapping and map the address space again.
+
+    This patch implements loading the mian U-Boot image into L2SRAM, so
+    the image can configure the system memory by using SPD EEPROM.
+
+    Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 9a1a0aedbbd56f901bfbc124f18ec6d9dcefe282
+Author: Mingkai Hu <Mingkai.hu@freescale.com>
+Date:	Wed Sep 23 15:20:37 2009 +0800
+
+    NAND boot: MPC8536DS support
+
+    MPC8536E can support booting from NAND flash which uses the
+    image u-boot-nand.bin. This image contains two parts: a 4K
+    NAND loader and a main U-Boot image. The former is appended
+    to the latter to produce u-boot-nand.bin. The 4K NAND loader
+    includes the corresponding nand_spl directory, along with the
+    code twisted by CONFIG_NAND_SPL. The main U-Boot image just
+    like a general U-Boot image except the parts that included by
+    CONFIG_SYS_RAMBOOT.
+
+    When power on, eLBC will automatically load from bank 0 the
+    4K NAND loader into the FCM buffer RAM where CPU can execute
+    the boot code directly. In the first stage, the NAND loader
+    copies itself to RAM or L2SRAM to free up the FCM buffer RAM,
+    then loads the main image from NAND flash to RAM or L2SRAM
+    and boot from it.
+
+    This patch implements the NAND loader to load the main image
+    into L2SRAM, so the main image can configure the RAM by using
+    SPD EEPROM. In the first stage, the NAND loader copies itself
+    to the second to last 4K address space, and uses the last 4K
+    address space as the initial RAM for stack.
+
+    Obviously, the size of L2SRAM shouldn't be less than the size
+    of the image used. If so, the workaround is to generate another
+    image that includes the code to configure the RAM by SPD and
+    load it to L2SRAM first, then relocate the main image to RAM
+    to boot up.
+
+    Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 07355700523203c5f72018712cf0d93683f255c8
+Author: Mingkai Hu <Mingkai.hu@freescale.com>
+Date:	Wed Sep 23 15:19:32 2009 +0800
+
+    mpc8536: fix board config file line length
+
+    Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit dd9ca98f2600000e5c2744735040100b770650e7
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date:	Fri Sep 25 11:14:11 2009 -0400
+
+    sbc8548: reclaim wasted sector in boot flash
+
+    By nature of being based off the MPC8548CDS board, this
+    board inherited an ENV_SIZE setting of 256k.  But since
+    it has a smaller flash device (8MB soldered on), it has
+    a native sector size of 128k, and hence the ENV_SIZE was
+    causing 2 sectors to be used for the environment.
+
+    By removing the unused sector, we can push TEXT_BASE up
+    closer to the end of address space and reclaim that
+    sector for any other application.  This also fixes the
+    mismatch between TEXT_BASE and MONITOR_LEN reported by
+    Kumar earlier.
+
+    Since this board also supports the ability to boot off
+    the 64MB SODIMM flash, this change is forward looking
+    with that in mind; i.e. the settings for MONITOR_LEN
+    and ENV_SIZE will work when the 512k sectors of the
+    SODIMM flash are used for alternate boot in the future.
+
+    Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 8280912e0657e96a7b7d8da7003656d62b0fd109
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Mon Sep 28 21:38:00 2009 -0500
+
+    ppc/85xx: Clean up immap_85xx.h
+
+    * Converted all white space to tabs
+    * Converted all types to u8/u16/u32
+    * Reduce lines to fit in 80 columns
+    * Renamed MPC85xx_{Q,B}MAN -> FSL_CORENET_{Q,B}MAN
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit d44e9c1736283f0abc5d3c5d28cfea8480c93a79
+Author: Scott Wood <scottwood@freescale.com>
+Date:	Mon Sep 28 16:33:18 2009 -0500
+
+    NAND: davinci: Fix warnings when 4-bit ECC not used
+
+    I accidentally left v2 of "NAND: DaVinci:Adding 4 BIT ECC support"
+    applied when I pushed the tree last merge window, and missed these fixes
+    which were in v3 of that patch.
+
+    Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+    Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit ca6189db484882798f2a35a476c07e618e21f6d3
+Author: Kyungmin Park <kmpark@infradead.org>
+Date:	Tue Sep 22 09:05:00 2009 +0900
+
+    Refactor OneNAND IPL code
+
+    Refactoring the OneNAND IPL code
+
+    and some minor fixed:
+    - Remove unnecessary header file
+    - Fix wrong access at read interrupt
+    - The recent OneNAND has 4KiB pagesize
+
+    Also Board can override OneNAND IPL image
+
+    Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
+
+commit a05e3f9a084fc8951d87745b3a91df246432df7d
+Author: Shinya Kuribayashi <skuribay@pobox.com>
+Date:	Sat Sep 12 18:01:40 2009 +0900
+
+    MIPS: VCT: Remove read_spareram reference
+
+    The commit ecad289fc6bd9d89ef4d5093cc7b6fd712fd0d29 (OneNAND: Remove
+    unused read_spareram and add unlock_all as kernel does) forgot to remove
+    a local reference to read_spareram in board/micronas/vct/ebi_onenand.c,
+    which causes the following build failure when configured with OneNAND:
+
+    ebi_onenand.c: In function 'onenand_board_init':
+    ebi_onenand.c:196: error: 'struct onenand_chip' has no member named 'read_spareram'
+    make[1]: *** [ebi_onenand.o] Error 1
+    make[1]: *** Waiting for unfinished jobs....
+    make: *** [board/micronas/vct/libvct.a] Error 2
+
+    Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
+    Acked-by: Stefan Roese <sr@denx.de>
+    Cc: Kyungmin Park <kyungmin.park@samsung.com>
+    Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit ef37c6835eac66206a9c7c11f0c7186f5d64bf91
+Author: Simon Kagstrom <simon.kagstrom@netinsight.net>
+Date:	Fri Sep 25 14:05:57 2009 +0200
+
+    ubifs: Correct dereferencing of files-after-symlinks
+
+    Files in directories which are symlinked to were not dereferenced
+    correctly in last commit. E.g., with a symlink
+
+       /boot/lnk -> /boot/real_dir
+
+    loading
+
+       /boot/lnk/uImage
+
+    will fail. This patch fixes that by simply seeing to it that the target
+    base directory has a slash after it.
+
+    Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit b306db2f1bf561b5823a655c677fe28cfad80cfb
+Author: Stefan Roese <sr@denx.de>
+Date:	Thu Sep 24 14:10:30 2009 +0200
+
+    ppc4xx: Remove mtsdram0() marcos and use common mtsdram() instead
+
+    Additionally some whitespace coding style fixes.
+
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 95b602bab5fec2fffab07a01ea3947c70d1bacc1
+Author: Stefan Roese <sr@denx.de>
+Date:	Thu Sep 24 13:59:57 2009 +0200
+
+    ppc4xx: Convert PPC4xx SDRAM defines from lower case to upper case
+
+    The latest PPC4xx register cleanup patch missed some SDRAM defines.
+    This patch now changes lower case UIC defines to upper case. Also
+    some names are changed to match the naming in the IBM/AMCC users
+    manuals (e.g. mem_mcopt1 -> SDRAM0_CFG).
+
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 952e7760bfc5b0e3b142b9ce34e7fbb7d008c900
+Author: Stefan Roese <sr@denx.de>
+Date:	Thu Sep 24 09:55:50 2009 +0200
+
+    ppc4xx: Convert PPC4xx UIC defines from lower case to upper case
+
+    The latest PPC4xx register cleanup patch missed the UIC defines.
+    This patch now changes lower case UIC defines to upper case.
+
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit d1c9e5b37901b53ffc1ce3f08ec8ed61bfd557b6
+Author: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+Date:	Tue Sep 22 13:40:44 2009 +0200
+
+    fsl_i2c: Do not generate STOP after read.
+
+    __i2c_read always ends with a STOP condition thereby releasing
+    the bus. It is cleaner to do the STOP magic in i2c_read(), like
+    i2c_write() does. This may also help future multimaster systems which
+    wants to hold on to the bus until all transactions are finished.
+
+    Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+
+commit 99404202127346b9e91503bbd69deafa18c980c4
+Author: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+Date:	Thu Sep 17 11:07:17 2009 +0200
+
+    fsl_i2c: Impl. AN2919, rev 5 to calculate FDR/DFSR
+
+    The latest AN2919 has changed the way FDR/DFSR should be calculated.
+    Update the driver according to spec. However, Condition 2
+    is not accounted for as it is not clear how to do so.
+
+    Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+    Acked-by: Wolfgang Grandegger <wg@grandegger.com>
+
+commit d01ee4db9302cfccaa5c548a1c4e873b415681a0
+Author: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+Date:	Thu Sep 17 11:07:16 2009 +0200
+
+    fsl_i2c: Add CONFIG_FSL_I2C_CUSTOM_{DFSR/FDR}
+
+    Some boards need a higher DFSR value than the spec currently
+    recommends so give these boards the means to define there own.
+
+    For completeness, add CONFIG_FSL_I2C_CUSTOM_FDR too.
+
+    Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+
+commit 21f4cbb77299788e2b06c9b0f48cf20a5ab00d4a
+Author: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+Date:	Thu Sep 17 11:07:15 2009 +0200
+
+    fsl_i2c: Wait for STOP condition to propagate
+
+    After issuing a STOP one must wait until the STOP has completed
+    on the bus before doing something new to the controller.
+
+    Also add an extra read of SR as the manual mentions doing that
+    is a good idea.
+
+    Remove surplus write of CR just before a write, isn't required and
+    could potentially disturb the I2C bus.
+
+    Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+
+commit c7190f028fa950d4d36b6d0b4bb3fc72602ec54c
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date:	Fri Sep 25 18:19:44 2009 -0500
+
+    mpc83xx: retain POR values of non-configured ACR, SPCR, SCCR, and LCRR bitfields
+
+    some LCRR bits are not documented throughout the 83xx family RMs.
+    New board porters copying similar board configurations might omit
+    setting e.g., DBYP since it was not documented in their SoC's RM.
+
+    Prevent them bricking their board by retaining power on reset values
+    in bit fields that the board porter doesn't explicitly configure
+    via CONFIG_SYS_<registername>_<bitfield> assignments in the board
+    config file.
+
+    also move LCRR assignment to cpu_init_r[am] to help ensure no
+    transactions are being executed via the local bus while CLKDIV is being
+    modified.
+
+    also start to use i/o accessors.
+
+    Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 00ec0ff549b8cb6fb6d40e275aeb5a460642a3bd
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date:	Mon Sep 21 17:44:51 2009 -0400
+
+    sbc8349: tidy up Makefile to use new configuration script.
+
+    Commit 804d83a5 allows us to move all the configuration
+    variation tweaks out of the top level Makefile and down
+    into the board config header.  This takes advantage of
+    that for the sbc8349 board.
+
+    Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+    Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit da6eea0f48c24a318e6de69d6bca0bb5ab70572b
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date:	Wed Sep 16 23:22:08 2009 +0400
+
+    mpc83xx: mpc8360emds: Add QE USB device tree fixups
+
+    With this patch we can change QE USB mode without need to hand-edit
+    the device tree.
+
+    Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+    Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 89da44ce3fe1638312d71cb3add8c6a6d2c7c1f3
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date:	Wed Sep 16 23:21:59 2009 +0400
+
+    mpc83xx: mpc8360emds: Use RGMII-ID mode, add workarounds for rev. 2.1 CPUs
+
+    This patch fixes various ethernet issues with gigabit links handling
+    in U-Boot. The workarounds originally implemented by Kim Phillips for
+    Linux kernel.
+
+    Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+    Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 034477bb31948d698d18b84bc0834c3e25a14d04
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date:	Wed Sep 16 23:21:57 2009 +0400
+
+    mpc83xx: mpc8360emds: Don't use LBC SDRAM when DDR is available
+
+    Since commit 5c2ff323a94e27e481f70c44838d43fcd844dd46 ("mpc8360emds:
+    rework LBC SDRAM setup"), LBC SDRAM is available for use in Linux.
+
+    Though, it appears that QE Ethernet in Gigabit mode can't transmit
+    large packets when it tries to work with a data in LBC SDRAM (memtest
+    didn't discover any issues, is LBC SDRAM just too slow?).
+
+    With this patch we can still use the board without DDR memory, but
+    if DDR is available, we don't use LBC SDRAM.
+
+    Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+    Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit d77c779bc23596aa3693d1c5c4d5b6e1072f93f2
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date:	Wed Sep 16 23:21:55 2009 +0400
+
+    net: uec: Fix uccf.h and uec.h headers to include headers they depend on
+
+    Headers should include headers containing prototypes and defines they
+    depend on, don't assume that they're included by somebody else.
+
+    Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+    Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 6185f80c311cc3bdef2f8d5096c61e40ca6f48b2
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date:	Wed Sep 16 23:21:53 2009 +0400
+
+    net: uec_phy: Implement TXID and RXID RGMII modes for Marvell PHYs
+
+    This will be needed for MPC8360E-MDS boards with rev. 2.1 CPUs.
+
+    Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+    Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 984f10baac8ef6032df52f135943d6b0bc96f724
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Fri Sep 25 14:16:00 2009 +0200
+
+    mpc5121ads: fix breakage introduced when reordering elpida_mddrc_config[]
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 6e748ea004473cce99fbde6382dd580c10ffdb60
+Author: Ken MacLeod <ken@bitsko.slc.ut.us>
+Date:	Fri Sep 11 15:16:18 2009 -0500
+
+    cmd_fdt.c: fix parse of byte streams and strings
+
+    Commit 4abd844d8e extended the fdt command parser to handle property
+    strings which are split across multiple arguments but it was broken for
+    byte streams and strings.
+
+    Byte stream parsing:
+
+     * Fixes where it would terminate early or go into an endless loop.
+
+     * Fixes a 0x00 being inserted into the data if there is a space after
+       '[' or a separate argument.
+
+     * Fixes dereferencing the argument pointer after the last argument.
+
+     * Checks for bad characters.
+
+    String parsing:
+
+     * Treat multiple arguments as a string list.  This fixes an issue where
+       only the last argument was stored.
+
+    Signed-off-by: Ken MacLeod <ken@bitsko.slc.ut.us>
+
+commit 3887c3fbdbbe6bbb4df60ed415c8e1ab9fe56b5e
+Author: Heiko Schocher <hs@denx.de>
+Date:	Wed Sep 23 07:56:08 2009 +0200
+
+    mucmc52, uc101: delete ata@3a00 node, if no CF card is detected
+
+    U-Boot can detect if an IDE device is present or not.
+    If not, and this new config option is activated, U-Boot
+    removes the ATA node from the DTS before booting Linux,
+    so the Linux IDE driver does not probe the device and
+    crash. This is needed for buggy hardware (uc101) where
+    no pull down resistor is connected to the signal IDE5V_DD7.
+
+    Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 7f625fc6d3ba8f890e843ac01717804c2462ed53
+Author: Heiko Schocher <hs@denx.de>
+Date:	Wed Sep 23 07:56:04 2009 +0200
+
+    mpc5200, mucmc52, uc101: config cleanup
+
+    - As these boards are similiar, collect common config options
+      in manroland/common.h and manroland/mpc52xx-common.h
+      for mpc5200 specific common options for this manufacturer.
+    - add OF support
+    - update default environment
+
+    Signed-off-by: Heiko Schocher <hs@denx.de>
+
+    Minor edit of commit message.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 9d142ea8f787882ab732fa531a34db091bfa363d
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Fri Sep 25 00:57:49 2009 +0200
+
+    Fix "ppc/85xx: Clean up use of LAWAR defines" breakage
+
+    Commit 002741ae86 modified include/asm-ppc/mmu.h such that the LAWAR_
+    defines were only enabled for the 83xx platform, but they are also
+    needed on MPC512x system. Enabling these for E300 systems seems thus
+    more appropriate.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit a5aa3998ab6408a6ac738a3ce8005e647b9465f8
+Author: Martha M Stan <mmarx@silicontkx.com>
+Date:	Mon Sep 21 14:08:00 2009 -0400
+
+    Add Elpida Memory Configuration to mpc5121ads Boards
+
+    Signed-off-by: Martha M Stan <mmarx@silicontkx.com>
+
+    Minor coding style cleanup.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 054197ba8ee5ef1e41694df58531b6e53ec43f2d
+Author: Martha M Stan <mmarx@silicontkx.com>
+Date:	Mon Sep 21 14:07:14 2009 -0400
+
+    mpc512x: Streamlined fixed_sdram() init sequence.
+
+    Signed-off-by: Martha M Stan <mmarx@silicontkx.com>
+
+    Minor cleanup:
+
+    Re-ordered default_mddrc_config[] to have matching indices.
+
+    This allows to use the same index "N" for source and target fields;
+    before, we had code like this
+
+	out_be32(&im->mddrc.ddr_time_config2, mddrc_config[3]);
+
+    which always looked like a copy & paste error because 2 != 3.
+
+    Also, use NULL when meaning a null pointer.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 39aaca1f66a0e5b1204b0789f6c0097938c00ad1
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Mar 19 02:46:19 2009 -0500
+
+    ppc/p4080: Determine various chip frequencies on CoreNet platforms
+
+    The means to determine the core, bus, and DDR frequencies are completely
+    new on CoreNet style platforms.  Additionally on p4080 we can have
+    different frequencies for FMAN and PME IP blocks.  We need to keep track
+    of the FMAN & PME frequencies since they are used for time stamping
+    capabilities inside each block.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 3c2a67eec8a0facc865b400caca52e7f6b7adf01
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Sep 17 01:52:37 2009 -0500
+
+    ppc/p4080: Handle timebase enabling and frequency reporting
+
+    On CoreNet style platforms the timebase frequency is the bus frequency
+    defined by 16 (on PQ3 it is divide by 8).  Also on the CoreNet platforms
+    the core not longer controls the enabling of the timebase.	We now need
+    to enable the boot core's timebase via CCSR register writes.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 7e4259bba4c56536760e42d32dacfb3233f216fd
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Mar 19 02:39:17 2009 -0500
+
+    ppc/p4080: Add various p4080 related defines (and p4040)
+
+    There are various locations that we have chip specific info:
+
+    * Makefile for which ddr code to build
+    * Added p4080 & p4040 to cpu_type_list and SVR list
+    * Added number of LAWs for p4080
+    * Set CONFIG_MAX_CPUS to 8 for p4080
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 39a7e7fd538cdf49e7e8a2f0634ea5e15e12b4ec
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Sep 17 01:44:39 2009 -0500
+
+    ppc/p4080: CoreNet platfrom style secondary core release
+
+    The CoreNet platform style of bringing secondary cores out of reset is
+    a bit different that the PQ3 style.  Mostly the registers that we use
+    to setup boot translation, enable time bases, and boot release the cores
+    have moved around.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit a880cf3e0e1c220d780eccd0b101170c4499485d
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Sep 17 01:44:00 2009 -0500
+
+    ppc/p4080: CoreNet platfrom style CCSRBAR setting
+
+    On CoreNet based platforms the CCSRBAR address is split between an high &
+    low register and we no longer shift the address.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+    Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 418ec8584343f04048e2cc7ee96b6b29be54ad97
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Mar 19 02:32:23 2009 -0500
+
+    ppc/p4080: Add support for CoreNet style platform LAWs
+
+    On CoreNet based platforms the LAW address is split between an high &
+    low register and we no longer shift the address.  Also, the target IDs
+    on CoreNet platforms have been completely re-assigned.
+
+    Additionally, added a new find_law() API to which LAW an address hits in.
+    This is need for the CoreNet style boot release code since it will need
+    to determine what the target ID should be set to for boot window
+    translation.
+
+    Finally, enamed LAWAR_EN to LAW_EN and moved to header so we can use
+    it elsewhere.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 01df521217957d77d53c2d570183eded7030938f
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Wed Sep 16 09:43:12 2009 -0500
+
+    ppc/p4080: Add p4080 platform immap definitions
+
+    The p4080 SoC has a significant amount of commonality with the 85xx/PQ3
+    platform.  We reuse the 85xx immap and just add new definitions for
+    local access and global utils.  The global utils is now broken into
+    global utils, clocking and run control/power management.
+
+    The offsets from CCSR for a number of blocks have also changed.  We
+    introduce the CONFIG_FSL_CORENET define to distinquish the PQ3 style of
+    platform from the new p4080 platform.  We don't use QoirQ as there are
+    products (like p2020) that are PQ3 based platforms but have the QoirQ
+    name.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 25bacf7a2b096496e2c58f2de4e5b2bce8fba038
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Tue Sep 22 15:45:44 2009 -0500
+
+    ppc/85xx: Fix enabling of L2 cache
+
+    We need to flash invalidate the locks in addition to the cache
+    before we enable.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit cb0ff65c619efacdc0ba69aa8ee6ede7dd364a38
+Author: Vivek Mahajan <vivek.mahajan@freescale.com>
+Date:	Tue Sep 22 12:48:27 2009 +0530
+
+    85xx-fdt: Fixed l2-ctlr's compatible prop for QorIQ
+
+    The code assumed names where just numbers and always prefixed 'mpc'.
+    However newer QorIQ don't follow the mpc naming scheme.
+
+    Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 234a89d911ce28e46372f555d7c14e28424f2b0d
+Author: Mingkai Hu <Mingkai.hu@freescale.com>
+Date:	Tue Sep 22 14:53:21 2009 +0800
+
+    ppc/85xx: add cpu init config file for boot from NAND
+
+    When boot from NAND, the NAND flash must be connected to br/or0.
+    Also init RAM(L2 SRAM or DDR SDRAM) for load the second image to
+    it.
+
+    Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 266139b88b43ae1d87abb5f5431e6f57b801795f
+Author: Mingkai Hu <Mingkai.hu@freescale.com>
+Date:	Tue Sep 22 14:53:34 2009 +0800
+
+    immap_85xx: add porpllsr's plat ratio definition
+
+    Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 098bcbae3172d73d24ca8ba196328d901eed4132
+Author: Mingkai Hu <Mingkai.hu@freescale.com>
+Date:	Tue Sep 22 14:53:10 2009 +0800
+
+    ppc/85xx: add ld script file for boot from NAND
+
+    The first stage 4K image uses a seperate ld script file to
+    generate 4K image. This patch moves it to the cpu/mpc85xx/*
+    to make it avaliable for 85xx platform.
+
+    Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 8439f05cfd8cbb38485376a34d9fe297ba262737
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Mon Sep 21 23:09:28 2009 -0500
+
+    mpc8610hpcd: Use common 86xx fdt fixup code
+
+    Using the common 86xx fdt fixups removes some board-specific code and
+    should make the mpc8610hpcd easier to maintain in the long run.
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 928435d11b898870415910efff87a4d6399cecb8
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date:	Mon Sep 21 17:19:17 2009 -0400
+
+    sbc85x0: tidy up Makefile to use new configuration script.
+
+    Commit 804d83a5 allows us to move all the configuration
+    variation tweaks out of the top level Makefile and down
+    into the boards config header.  This takes advantage of
+    that for the sbc8540/sbc8560 boards.
+
+    There were a couple of cheezy comments pointing at incorrect
+    files, or files that don't exist, so I've cleaned those up too.
+
+    Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 2738bc8df65ec905094d83f62f87fed123a03b9c
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date:	Sun Sep 20 20:36:06 2009 -0400
+
+    sbc8548: allow enabling PCI via a make config option
+
+    Prior to this commit, to enable PCI, you had to go manually
+    edit the board config header, and if you had 33MHz PCI, you
+    had to manually change CONFIG_SYS_NS16550_CLK too, which was
+    not real user friendly,
+
+    This adds the typical PCI and clock speed make targets to the
+    toplevel Makefile in accordance with what is being done with
+    other boards (i.e. using the "-t" to mkconfig).
+
+    Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit fdc7eb90b504daa020f290604d50da8f7cb70d8a
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date:	Sun Sep 20 20:36:05 2009 -0400
+
+    sbc8548: update PCI/PCI-e support code
+
+    The PCI/PCI-e support for the sbc8548 was based on an earlier
+    version of what the MPC8548CDS board was using, and in its
+    current state it won't even compile.  This re-syncs it to match
+    the latest codebase and makes use of the new shared PCI functions
+    to reduce board duplication.
+
+    It borrows from the MPC8568MDS, in that it pulls the PCI-e I/O
+    back to 0xe280_0000 (where PCI2 would be on MPC8548CDS), and
+    similarly it coalesces the PCI and PCI-e mem into one single TLB.
+
+    Both PCI-x and PCI-e have been tested with intel e1000 cards
+    under linux (with an accompanying dts change in place)
+
+    Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit a8b3e90f798e0cca5f11c912f9d0823a1c5b6c24
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date:	Sun Sep 20 20:36:01 2009 -0400
+
+    fsl_pci: create a SET_STD_PCI_INFO() helper wrapper
+
+    Recycle the recently added PCI-e wrapper used to reduce board
+    duplication of code by creating a similar version for plain PCI.
+
+    Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 11d5a629f8a40f9d7cffc74e58f4e3ed258e56ab
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date:	Sun Sep 20 20:36:04 2009 -0400
+
+    sbc8548: correct local bus SDRAM size from 64M to 128M
+
+    The size of the LB SDRAM on this board is 128MB, spanning CS3
+    and CS4.  It was previously only being configured for 64MB on
+    CS3, since that was what the original codebase of the MPC8548CDS
+    had.  In addition to setting up BR4/OR4, this also adds the TLB
+    entry for the second half of the SDRAM.
+
+    Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 0c7e4d45d9fb3c9e503ee93d50572d346dae150e
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date:	Sun Sep 20 20:36:03 2009 -0400
+
+    sbc8548: use I/O accessors
+
+    Sweep throught the board specific file and replace the various
+    register proddings with the equivalent I/O accessors.
+
+    Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit fc38eb98ff226f2c53eecbee033a6ab7619473dc
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date:	Sun Sep 20 20:36:02 2009 -0400
+
+    sbc8548: remove eTSEC3/4 voltage hack
+
+    With only eTSEC1 and 2 being brought out to RJ-45 connectors, we
+    aren't interested in the eTSEC3/4 voltage hack on this board
+
+    Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 9b3ba24f18900633a394416cc056c44a1a6eb754
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date:	Fri Sep 18 19:08:41 2009 -0400
+
+    sbc8548: enable access to second bank of flash
+
+    The sbc8548 has a 64MB SODIMM flash module off of CS6 that
+    previously wasn't enumerated by u-boot.  There were already
+    BR6/OR6 settings for it [used by cpu_init_f()] but there
+    was no TLB entry and it wasn't in the list of flash banks
+    reported to u-boot.
+
+    The location of the 64MB flash is "pulled back" 8MB from
+    a 64MB boundary, in order to allow address space for the
+    8MB boot flash that is at the end of 32 bit address space.
+    This means creating two 4MB TLB entries for the 8MB chunk,
+    and then expanding the original boot flash entry to 64MB
+    in order to cover the 8MB boot flash and the remainder
+    (56MB) of the user flash.
+
+    Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit ded58f4153923dfff16d2f96495bd7acf1f7e10e
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date:	Wed Sep 23 17:30:57 2009 -0400
+
+    sbc8548: cosmetic line re-wrap
+
+    Fix the extra long lines to be consistent with u-boot coding style.
+    No functional change here.
+
+    Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+
+commit 2c40acd3525b75db3fcd3f5a5bd40445679b5547
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date:	Fri Sep 18 19:08:40 2009 -0400
+
+    sbc8548: get_clock_freq is not valid for this board
+
+    The get_clock_freq() comes from freescale/common/cadmus.c and is
+    only valid for the CDS based 85xx reference platforms.  It would
+    be nice if we could read the 33 vs. 66MHz status somehow, but in
+    the meantime, tie it to CONFIG_SYS_CLK_FREQ like all the other
+    non-CDS boards do.
+
+    Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 7b1f1399e876587e0a268a5a471dd444bfbc3114
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date:	Fri Sep 18 19:08:39 2009 -0400
+
+    sbc8548: delete unused MPC8548CDS info carried over from port
+
+    There are a couple defines and PCI bridge quirks related to the PCI
+    backplane of the MPC8548CDS that have no meaning in the context of
+    the port to the sbc8548 board, so delete them.
+
+    Also, the form factor of the sbc8548 is a standalone board with a
+    single PCI-X and a single PCI-e slot.  That pretty much guarantees
+    that it will never be a PCI agent itself, so the host/agent and root
+    complex/end node distinctions have been removed.
+
+    Similarly, since there is no physical connector mapping to PCI2, so
+    all references of PCI2 in the board support files have been removed
+    as well.
+
+    Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 94ca091456d5c3040ddd6351c80cf3e74393f9be
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date:	Fri Sep 18 19:08:44 2009 -0400
+
+    sbc8548: enable use of PCI network cards
+
+    Create a board_eth_init to allow a place to hook in
+    the PCI ethernet init after all the eTSEC are up
+    and configured.
+
+    Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 82b7725b6d46d9ad2b962b4cdfa896bd5ee32fb5
+Author: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+Date:	Sat Sep 19 17:50:17 2009 +0530
+
+    ppc/85xx: 32bit DDR changes for P1020/P1011
+
+    The P1020/P1011 SOCs support max 32bit DDR width as opposed to P2020/P2010
+    where max DDR data width supported is 64bit.
+
+    As a next step the DDR data width initialization would be made more dynamic
+    with more flexibility from the board perspective and user choice.
+    Going forward we would also remove the hardcodings for platforms with onboard
+    memories and try to use the FSL SPD code for DDR initialization.
+
+    Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit bd42bbb858dde713f023fc2e4f512ec174a1a8d2
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date:	Fri Sep 18 19:08:46 2009 -0400
+
+    sbc8548: replace README with completely new document
+
+    The previous README.sbc8548 was pretty much content-free. Replace
+    it with something that actually gives the end user some relevant
+    hardware details, and also lists the u-boot configuration choices.
+
+    Also in the cosmetic department, fix the bogus line in the Makefile
+    that was carried over from the SBC8560 Makefile, and the typo in
+    the sbc8548.c copyright.
+
+    Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 002741ae862c1c7e3dad89d020e392e6add1c05d
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Sat Sep 19 11:20:54 2009 -0500
+
+    ppc/85xx: Clean up use of LAWAR defines
+
+    On 85xx platforms we shouldn't be using any LAWAR_* defines
+    but using the LAW_* ones provided by fsl-law.h.  Rename any such
+    uses and limit the LAWAR_ to the 83xx platform as the only user so
+    we will get compile errors in the future.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit f61dae7c9dc526410faec15ce352b11fc36a560b
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Sep 3 10:20:09 2009 -0500
+
+    ppc/85xx: Clean up mpc8572DS PCI setup code
+
+    Use new fsl_pci_init_port() that reduces amount of duplicated code in the
+    board ports, use IO accessors and clean up printing of status info.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 4958af8735207640181c4423e41b24ee7418361a
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Sep 3 09:42:01 2009 -0500
+
+    ppc/85xx: Clean up p2020ds PCI setup code
+
+    Use new fsl_pci_init_port() that reduces amount of duplicated code in the
+    board ports, use IO accessors and clean up printing of status info.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 93a83872c707891bad22f7776d79a650c870601f
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Sep 3 10:09:04 2009 -0500
+
+    ppc/85xx: Clean up p1_p2_rdb PCI setup
+
+    General code cleanup to use in/out IO accessors as well as making
+    the code that prints out info sane between board and generic fsl pci
+    code.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 62ca21c442e18fec118ec83e183d64ea49966ce7
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Sep 10 16:31:53 2009 -0500
+
+    ppc/85xx: Simplify the top makefile for P1_P2_RDB boards
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit a0f9e0e0f06033807de0ae017ad4d9cf5ddff84b
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Sep 10 16:26:37 2009 -0500
+
+    ppc/85xx: Simplify the top makefile for 36-bit config for P2020DS
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit f9edcc10e6cb497dd7dcbaf691cfd1859abae27a
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Sep 10 16:23:45 2009 -0500
+
+    ppc/85xx: Simplify the top makefile for 36-bit config for MPC8572DS
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 0e905ac28b1e039d74e63232293972bff6b5a0ce
+Author: Mingkai Hu <Mingkai.hu@freescale.com>
+Date:	Fri Sep 18 11:45:09 2009 +0800
+
+    ppc/85xx: simplify the top makefile for 36-bit config for mpc8536ds
+
+    Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 202d94875c98b7b573f136c4f353609758ed9733
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Tue Sep 15 22:21:58 2009 -0500
+
+    ppc/85xx: Fix LCRR_CLKDIV defines
+
+    For some reason the CLKDIV field varies between SoC in how it interprets
+    the bit values.
+
+    All 83xx and early (e500v1) PQ3 devices support:
+     clk/2: CLKDIV = 2
+     clk/4: CLKDIV = 4
+     clk/8: CLKDIV = 8
+
+    Newer PQ3 (e500v2) and MPC86xx support:
+     clk/4: CLKDIV = 2
+     clk/8: CLKDIV = 4
+     clk/16: CLKDIV = 8
+
+    Ensure that the MPC86xx and MPC85xx still get the same behavior and make
+    the defines reflect their logical view (not the value of the field).
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+    Acked-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 55f786d8ba8ce58a81428536da34a2192b9bad9f
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Mon Sep 21 12:04:33 2009 -0500
+
+    MAKEALL: Use POSIX math
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 40a28f0885e62b6607e12ed6baa6284927f5263e
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Mon Sep 21 12:04:32 2009 -0500
+
+    MAKEALL: Add summary information
+
+    This change adds some basic summary information to the MAKEALL script.
+    The summary information includes how many boards were compiled, how many
+    boards had compile warnings or errors, and which specific boards had
+    compile warnings or errors.
+
+    This information is useful when doing compile testing to quickly
+    determine which boards are broken.
+
+    As a side benefit, no empty $BOARD.ERR files are generated by MAKEALL.
+    Previously, each board had a corresponding $BOARD.ERR file, even if the
+    board compiled cleanly.
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 71ce9bd7f551e44c4ddb4c985c095da6d3452d79
+Author: Eric Millbrandt <emillbrandt@coldhaus.com>
+Date:	Mon Sep 21 11:05:55 2009 -0500
+
+    galaxy5200: enable version environment variable
+
+    Add version environment variable configuration to the galaxy5200
+    board header file.
+
+    Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
+
+    Edited commit message.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit c569ad6e1e8768a0fec513ffc156412240b7eb35
+Author: Werner Pfister <werner.pfister@intercontrol.de>
+Date:	Mon Sep 21 14:49:56 2009 +0200
+
+    digsy_mtc: Add TCR register value for RTC (DS1339)
+
+    Signed-off-by: Werner Pfister <werner.pfister@intercontrol.de>
+    Signed-off-by: Detlev Zundel <dzu@denx.de>
+
+commit b0078c8792badd81aed51b7eabe85e960036361c
+Author: Werner Pfister <werner.pfister@intercontrol.de>
+Date:	Mon Sep 21 14:49:55 2009 +0200
+
+    rtc/ds1337.c: Allow to set TCR register
+
+    This is needed to correctly start the charging of an attached capacitor
+    or battery.
+
+    Signed-off-by: Werner Pfister <werner.pfister@intercontrol.de>
+    Signed-off-by: Detlev Zundel <dzu@denx.de>
+
+commit 9d7952e4c636b8c99289a44dbe28c6f93c43b9f7
+Author: Simon Kagstrom <simon.kagstrom@netinsight.net>
+Date:	Tue Sep 15 09:53:29 2009 +0200
+
+    ubifs: Add support for looking up directory and relative symlinks
+
+    This patch adds support for resolving symlinks to directories as well as
+    relative symlinks. Symlinks are now always resolved during file lookup,
+    so the load stage no longer needs to special-case them.
+
+    Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit fcdb36b85ac033c09a9762a0a14808f7cb2ed54c
+Author: Rupjyoti Sarmah <rsarmah@amcc.com>
+Date:	Mon Sep 21 11:26:19 2009 -0700
+
+    ppc4xx: Fix PCIE PLL lock on 440SPe Yucca board
+
+    u-boot reports a PCIE PLL lock error at boot time on Yucca board, and
+    left PCIe nonfunctional. This is fixed by making u-boot function
+    ppc4xx_init_pcie() to wait 300 uS after negating reset before the
+    first check of the PLL lock.
+
+    Signed-off-by: Rupjyoti Sarmah <rsarmah@amcc.com>
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 91d599044caac4a8c228115b16cf3b073f902080
+Author: Dirk Eibach <eibach@gdsys.de>
+Date:	Mon Sep 21 13:27:14 2009 +0200
+
+    ppc4xx: Make DDR2 timing for intip more robust
+
+    DDR2 timing for intip was on the edge for some of the available chips
+    for this board. Now it is verfied to work with all of them.
+
+    Signed-off-by: Dirk Eibach <eibach@gdsys.de>
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 184a3a27f5cd2c64666f74df94c86b94c4383ef8
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Tue Sep 15 00:26:02 2009 +0200
+
+    board/linkstation/ide.c: Fix compile warning
+
+    Fix warning: ide.c:60: warning: dereferencing type-punned pointer will
+    break strict-aliasing rules
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+    Cc: Guennadi Liakhovetski <lg@denx.de>
+
+commit 004eca0c9ba328de457d5dc9ef8805639dfef893
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Wed Sep 16 22:03:08 2009 -0500
+
+    ppc: Clean up calling of phy_reset() during init
+
+    Remove board-specific #ifdefs for calling phy_reset() during
+    initializtion
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 3a8f28d0a6d9f8505017680233064c13e4587174
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Wed Sep 16 22:03:07 2009 -0500
+
+    ppc: Clean up calling of misc_init_r() during init
+
+    Remove board-specific #ifdefs for calling misc_init_r() during
+    initializtion
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+    Acked-by: Heiko Schocher <hs@denx.de>
+
+commit 3202d33169df04da5cf3dea8c5ab0a902b90ecaa
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Wed Sep 16 21:38:10 2009 -0500
+
+    Remove deprecated 'autoscr' command/variables
+
+    The more standard 'source' command provides identical functionality to
+    the autoscr command.
+
+    Environment variable names/values on the MVBC_P, MVBML7, kmeter1,
+    mgcoge, and km8xx boards are updated to no longer refernce 'autoscr'.
+
+    The 'autoscript' and 'autoscript_uname' environment variables are
+    also removed.
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+    Acked-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
+    Acked-by: Heiko Schocher <hs@denx.de>
+
+commit d3f4941874a20d8a390a36ba71335ae1db2f9ba0
+Author: Paul Gibson <paul.gibson2074@gmail.com>
+Date:	Wed Sep 16 10:05:00 2009 +1000
+
+    mpc512x. Micron nand flash needs a reset before a read command is issued.
+
+    Micron nand flash needs a reset before a read command is issued.
+    The current mpc5121_nfc driver ignores the reset command.
+
+commit b55ae40249545eabb9d6bfb850b1400a32561b1f
+Author: Marcel Ziswiler <marcel@ziswiler.com>
+Date:	Wed Sep 9 21:18:41 2009 +0200
+
+    FDT: remove obsolete OF_CPU and OF_SOC macros.
+
+    Signed-off-by: Marcel Ziswiler <marcel.ziswiler@noser.com>
+    Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+    Acked-by: Heiko Schocher <hs@denx.de>
+
+commit 3b6a9267f0de7b85d387fa4123d0b58379363447
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Tue Sep 15 00:09:21 2009 +0200
+
+    board/flagadm/flash.c: fix compile warning
+
+    Fix warning: flash.c:531: warning: dereferencing type-punned pointer
+    will break strict-aliasing rules
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+    Cc: Kári Davíðsson <kd@flaga.is>
+
+commit 0413cfecea350000eab5e591a0965c3e3ee0ff00
+Author: Simon Kagstrom <simon.kagstrom@netinsight.net>
+Date:	Thu Sep 17 15:15:52 2009 +0200
+
+    Correct ffs/fls regression for PowerPC etc
+
+    Commits
+
+      02f99901ed1c9d828e3ea117f94ce2264bf8389e
+      52d61227b66d4099b39c8309ab37cb67ee09a405
+
+    introduced a regression where platform-specific ffs/fls implementations
+    were defined away. This patch corrects that by using PLATFORM_xxx
+    instead of the name itself.
+
+    Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
+    Acked-by: Kumar Gala <galak@kernel.crashing.org>
+    Acked-by: Stefan Roese <sr@denx.de>
+
+commit e67af44d0167d8237dd2c2ddf8e301d19ca12914
+Author: Stefan Roese <sr@denx.de>
+Date:	Mon Sep 14 11:13:34 2009 +0200
+
+    ppc4xx: Consolidate get_OPB_freq()
+
+    All 4xx variants had their own, mostly identical get_OPB_freq()
+    function. Some variants even only had the OPB frequency calculated
+    in this routine and not supplied the sys_info.freqOPB variable
+    correctly (e.g. 405EZ). This resulted in incorrect OPB values passed
+    via the FDT to Linux.
+
+    This patch now removes all those copies and only uses one function
+    for all 4xx variants (except for IOP480 which doesn't have an OPB).
+
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 84a45d33c2cc261dbd5411f7c2ad45f6003025b6
+Author: Stefan Roese <sr@denx.de>
+Date:	Fri Sep 11 17:09:45 2009 +0200
+
+    ppc4xx: Enable commands for FDT enabled Linux booting on AMCC Acadia
+
+    Acadia still used the "old" arch/ppc bootm commands for booting
+    Linux images without FDT. This patch now enables these fdt-aware
+    boot commands for Acadia as well.
+
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 95a4a593b577b6e2f1da2d4b0f5ec86975c33413
+Author: Stefan Roese <sr@denx.de>
+Date:	Fri Sep 11 17:07:55 2009 +0200
+
+    ppc4xx: Fix 405EZ uart base baud calculation
+
+    With this fix, Linux correctly configures the baudrate when booting
+    with FDT passed from U-Boot to Linux.
+
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 15fba3279b56333bdb65ead366f82c945ed320d1
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Fri Sep 11 15:28:41 2009 -0500
+
+    ppc/85xx: Disable all async interrupt sources when we boot
+
+    We should make sure to clear MSR[ME, CE, DE] when we boot an OS image
+    since we have changed the exception vectors and the OSes vectors might
+    not be setup we should avoid async interrupts at all costs.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 9f00409a9d04cf533305531da32437130802f3a3
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Fri Sep 11 13:52:45 2009 -0500
+
+    ppc/85xx: Split out cpu_init_early into its own file for NAND_SPL
+
+    By pulling out cpu_init_early we can build just it and not all of
+    cpu_init for NAND_SPL.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 0456dbf3475d0aec42873a967ac97ed81f376119
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Fri Sep 11 13:41:49 2009 -0500
+
+    ppc/85xx: Change cpu_init_early_f so we can use with NAND SPL
+
+    Use write_tlb and don't use memset so we can use the same code for
+    cpu_init_early_f between NAND SPL and not.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 6e1385d5f8d137e741dfef02465d7dc328040ad7
+Author: Mingkai Hu <Mingkai.hu@freescale.com>
+Date:	Fri Sep 11 10:53:08 2009 +0800
+
+    NAND boot: change NAND loader's relocate SP to CONFIG param
+
+    So that we can set the NAND loader's relocate stack pointer
+    to the value other than the relocate address + 0x10000.
+
+    Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
+    Acked-by: Kim Phillips <kim.phillips@freescale.com>
+    Acked-by: Scott Wood <scottwood@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 7da53351d817c6d77364cfde922891f37d0e5ed8
+Author: Mingkai Hu <Mingkai.hu@freescale.com>
+Date:	Fri Sep 11 14:19:10 2009 +0800
+
+    ppc/85xx: add boot from NAND/eSDHC/eSPI support
+
+    The MPC8536E is capable of booting form NAND/eSDHC/eSPI, this patch
+    implements these three bootup methods in a unified way - all of these
+    use the general cpu/mpc85xx/start.S, and load the main image to L2SRAM
+    which lets us use the SPD to initialize the SDRAM.
+
+    For all three bootup methods, the bootup process can be divided into two
+    stages: the first stage will initialize the corresponding controller,
+    configure the L2SRAM, then copy the second stage image to L2SRAM and
+    jump to it. The second stage image is just like the general U-Boot image
+    to configure all the hardware and boot up to U-Boot command line.
+
+    When boot from NAND, the eLBC controller will first load the first stage
+    image to internal 4K RAM buffer because it's also stored on the NAND
+    flash. The first stage image, also call 4K NAND loader, will initialize
+    the L2SRAM, load the second stage image to L2SRAM and jump to it. The 4K
+    NAND loader's code comes from the corresponding nand_spl directory, along
+    with the code twisted by CONFIG_NAND_SPL.
+
+    When boot from eSDHC/eSPI, there's no such a first stage image because
+    the CPU ROM code does the same work. It will initialize the L2SRAM
+    according to the config addr/word pairs on the fixed address and
+    initialize the eSDHC/eSPI controller, then load the second stage image
+    to L2SRAM and jump to it.
+
+    The macro CONFIG_SYS_RAMBOOT is used to control the code to produce the
+    second stage image for all different bootup methods. It's set in the
+    board config file when one of the bootup methods above is selected.
+
+    Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit b2eec281a811bb52941f61203d8fe35256b3582c
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Fri Sep 11 12:32:01 2009 -0500
+
+    ppc/85xx: Move code around to prep for NAND_SPL
+
+    If we move some of the functions in tlb.c around we need less
+    ifdefs.  The first stage loader just needs invalidate_tlb and
+    init_tlbs.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 206af3527c05e520e28d38a48a1d15433e34675d
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Fri Sep 11 11:30:30 2009 -0500
+
+    ppc/85xx: Repack tlb_table to save space
+
+    We can pack the initial tlb_table in MAS register format and use
+    write_tlb to set things up.  This savings can be helpful for NAND
+    style first stage boot loaders.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit d30f9043539d372cf66406bc2f21bb8c20e67009
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Fri Sep 11 11:27:00 2009 -0500
+
+    ppc/85xx: Introduce low level write_tlb function
+
+    Factor out the code we use to actually write a tlb entry.
+
+    set_tlb is a logical view of the TLB while write_tlb is a low level
+    matching the MAS registers.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 0ead6f2ed7cf4e1f70dab5b529ad121e38359485
+Author: Roy Zang <tie-fei.zang@freescale.com>
+Date:	Thu Sep 10 14:44:48 2009 +0800
+
+    ppc/85xx: Enable usb ehci support for p2020ds board
+
+    Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 6d8565a1ed5acb01bad4a4cd74a93be5f7fb7f7c
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Sep 10 14:54:55 2009 -0500
+
+    ppc/8xxx: Misc DDR related fixes
+
+    * Fix setting of ESDMODE (MR1) register - the bit shifting was wrong
+    * Fix the format string to match size in a debug print
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 3e3c9c157b89eab2dc2f897899b1b95cd70c1a58
+Author: Scott Wood <scottwood@freescale.com>
+Date:	Thu Aug 20 17:45:00 2009 -0500
+
+    ppc/85xx: Remove some bogus code from external interrupt handler.
+
+    Skipping the interrupted instruction will accomplish nothing other
+    than turning a spurious interrupt into a crash.
+
+    External interrupts are not machine checks, so don't count them as such.
+
+    Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit dcc87dd58db466caa2d66755c5ec9455edf42fe8
+Author: Scott Wood <scottwood@freescale.com>
+Date:	Thu Aug 20 17:45:05 2009 -0500
+
+    ppc/85xx: Ensure that MAS8 is zero when writing TLB entries.
+
+    Its reset value is random, and we sometimes read uninitialized TLB
+    arrays.  Make sure that we don't retain MAS8 from reading such an entry
+    if the VF bit in MAS8 is set, attempts to use the mapping will trap.
+
+    Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 1b72dbecca2d7ad7a21c92d80227daa2d8ec5a57
+Author: Scott Wood <scottwood@freescale.com>
+Date:	Thu Aug 20 17:44:20 2009 -0500
+
+    ppc/85xx: Don't enable interrupts before we're ready
+
+    We cannot handle any exceptions while running in AS1, as the exceptions
+    will transition back to AS0 without a valid mapping.
+
+    Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 3ca55bce9c8bf00df06a20487fafc16fa2f8084b
+Author: Marcel Ziswiler <marcel@ziswiler.com>
+Date:	Fri Sep 11 07:50:33 2009 -0400
+
+    mpc8260: remove Ethernet node fixup to use generic FDT code.
+
+    Remove Ethernet node fixup from mgcoge and muas3001 boards and modify its
+    configs for the common mpc8260 code to use generic Ethernet fixup.
+
+    Signed-off-by: Marcel Ziswiler <marcel.ziswiler@noser.com>
+    Tested-by: Heiko Schocher <hs@denx.de>
+
+commit 1c20e4a9fbc531e2149ae061e8583f5fad82f163
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Wed Sep 9 12:20:21 2009 -0400
+
+    tools/netconsole: use ncb automatically if available
+
+    The standard netcat, while ubiquitous, doesn't handle broadcast udp packets
+    properly.  The local ncb util does however.  So if ncb can be located in
+    the standard locations, automatically use that instead.
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 770931805d292908a57a3d2c5f9a4fcde888b5a2
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Wed Sep 9 12:20:20 2009 -0400
+
+    tools/netconsole: make a bit more robust
+
+    The netcat utility likes to exit when it receives an empty packet (as it
+    thinks this means EOF).  This can easily occur when working with command
+    line editing as this behavior will be triggered when using backspace.  Or
+    with tabs and command line completion.  So create two netcat processes -
+    one to only listen (and put it into a loop), and one to do the sending.
+    Once the user quits the transmitting netcat, the listening one will be
+    killed automatically.
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit a6e19d69f63c14b7672c65ca4b014621c6fd0201
+Author: Simon Kagstrom <simon.kagstrom@netinsight.net>
+Date:	Mon Aug 24 09:10:16 2009 +0200
+
+    arm: Define test_and_set_bit and test_and_clear bit for ARM
+
+    Needed for (e.g.) ubifs support to work.
+
+    Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
+
+commit 52d61227b66d4099b39c8309ab37cb67ee09a405
+Author: Simon Kagstrom <simon.kagstrom@netinsight.net>
+Date:	Mon Aug 24 09:10:12 2009 +0200
+
+    Define ffs/fls for all architectures
+
+    UBIFS requires fls(), which is not defined for arm (and some other
+    architectures) and this patch adds it. The implementation is taken from
+    Linux and is generic. ffs() is also defined for those that miss it.
+
+    Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
+
+commit 4b15de08fe4d2c9d12a3764394731018a763216b
+Author: Simon Kagstrom <simon.kagstrom@netinsight.net>
+Date:	Mon Aug 24 09:10:03 2009 +0200
+
+    arm: Make arm bitops endianness-independent
+
+    Bring over the bitop implementations from the Linux
+    include/asm-generic/bitops/non-atomic.h to provide
+    endianness-independence.
+
+    Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
+
+commit 02f99901ed1c9d828e3ea117f94ce2264bf8389e
+Author: Simon Kagstrom <simon.kagstrom@netinsight.net>
+Date:	Mon Aug 24 09:09:50 2009 +0200
+
+    Move __set/clear_bit from ubifs.h to bitops.h
+
+    __set_bit and __clear_bit are defined in ubifs.h as well as in
+    asm/include/bitops.h for some architectures. This patch moves
+    the generic implementation to include/linux/bitops.h and uses
+    that unless it's defined by the architecture.
+
+    Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
+
+commit 557555fe0b82940ba7cc69f81d31d6ef4d4933b4
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Fri Sep 4 19:54:45 2009 -0400
+
+    standalone: convert to kbuild style
+
+    Clean up the arch/cpu/board/config checks as well as redundant setting of
+    srec/bin variables by using the kbuild VAR-$(...) style.
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 804d83a563c47b55e1f14f5de3b6e9d7e2a7ef5e
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Tue Sep 15 22:12:31 2009 +0200
+
+    mkconfig: split the board make target to multiple config targets
+
+    To simplify the top level makefile it useful to be able to parse
+    the top level makefile target to multiple individual target, then
+    put them to the config.h, leave the board config file to handle
+    the different targets.
+
+    Note that this method uses the '_'(underline) as the delimiter when
+    splits the board make target.
+
+    Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
+
+    This also reverts commit 511c02f611cb5afa1b8ca5980caaaabaa0de377f.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit ceb2d57c2205db5bbd868577f756c74a2568160c
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Tue Sep 15 21:13:27 2009 +0200
+
+    kwbimage.c: Fix compile warning when building on 64 bit systems (again)
+
+    Commit 51003b89 attempted to fix a build problem on 64 bit systems,
+    but just turned it into a build problem on 32 bit systems (silly me).
+
+    Now do the Right Thing (TM) and use a "%zu" printf format.
+
+    Also fix spelling error.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 6c7bc91fb3dba186d3398a1653f6db236510ffa7
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Fri Sep 11 11:30:34 2009 +0200
+
+    board/amcc/common/flash.c: Fix compile warning
+
+    Fix warning: ../common/flash.c:917: warning: dereferencing type-punned
+    pointer will break strict-aliasing rules
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+    Cc: Stefan Roese <sr@denx.de>
+    Acked-by: Stefan Roese <sr@denx.de>
+
+commit 70fb809c563c340538264d2a9436135e74c38bfe
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Fri Sep 11 11:47:07 2009 +0200
+
+    board/amcc/yucca/flash.c: Fix compile warning
+
+    Fix warning: flash.c:919: warning: dereferencing type-punned pointer
+    will break strict-aliasing rules
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+    Cc: Stefan Roese <sr@denx.de>
+    Acked-by: Stefan Roese <sr@denx.de>
+
+commit 030ec52f8cc83015f968db30208f4bd07feffa6c
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Fri Sep 11 11:44:39 2009 +0200
+
+    board/amcc/taihu/flash.c: Fix compile warning
+
+    Fix warnings:
+    flash.c: In function 'write_word_1':
+    flash.c:696: warning: dereferencing type-punned pointer will break strict-aliasing rules
+    flash.c: In function 'write_word_2':
+    flash.c:1044: warning: dereferencing type-punned pointer will break strict-aliasing rules
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+    Cc: Stefan Roese <sr@denx.de>
+    Acked-by: Stefan Roese <sr@denx.de>
+
+commit 0fd3d902d920f3e60f88530c33f1ae7581260951
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Fri Sep 11 11:37:20 2009 +0200
+
+    board/etin/debris/phantom.c: Fix compile error
+
+    Fix build problem caused by commit e84aba13: "Replace BCD2BIN and
+    BIN2BCD macros with inline functions"
+
+    phantom.c:163: error: redefinition of 'bcd2bin'
+    /home/wd/git/u-boot/work/include/bcd.h:16: error: previous definition of 'bcd2bin' was here
+    phantom.c:168: error: redefinition of 'bin2bcd'
+    /home/wd/git/u-boot/work/include/bcd.h:21: error: previous definition of 'bin2bcd' was here
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+    Cc: Sangmoon Kim <dogoil@etinsys.com>
+
+commit 5168801f4b71c2f8dcd92a80cfcfda84246e67fe
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Fri Sep 11 11:28:21 2009 +0200
+
+    board/dave/common/flash.c: fix compile warning
+
+    Fix warning: ../common/flash.c:668: warning: dereferencing type-punned
+    pointer will break strict-aliasing rules
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+    Cc: Andrea Marson <andrea.marson@dave-tech.it>
+
+commit 97138fc48091f2b063c4e32f36d05854b9d113fb
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Fri Sep 11 11:15:31 2009 +0200
+
+    board/esd/cpci750/ide.c: fix compile warning
+
+    Fix warning: ide.c:54: warning: dereferencing type-punned pointer will
+    break strict-aliasing rules
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+    Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+    Cc: Stefan Roese <sr@denx.de>
+    Acked-by: Stefan Roese <sr@denx.de>
+
+commit ba73060cf4163bd5eb1711020126e2f7f62d363e
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Fri Sep 11 10:13:26 2009 +0200
+
+    board/esd/common/flash.c: Fix compile warning
+
+    Fix warning: ../common/flash.c:635: warning: dereferencing type-punned
+    pointer will break strict-aliasing rules
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+    Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+    Cc: Stefan Roese <sr@denx.de>
+    Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
+    Acked-by: Stefan Roese <sr@denx.de>
+
+commit 2d6d9f0848e952ea33c658dfba335685a2725b8b
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Fri Sep 11 09:36:31 2009 +0200
+
+    sk98lin: fix compile warnings
+
+    Fix warnings:
+    skge.c: In function 'BoardInitMem':
+    skge.c:1389: warning: dereferencing type-punned pointer will break strict-aliasing rules
+    skge.c:1390: warning: dereferencing type-punned pointer will break strict-aliasing rules
+    skge.c:1391: warning: dereferencing type-punned pointer will break strict-aliasing rules
+    skgesirq.c: In function 'SkGePortCheckUpXmac':
+    skgesirq.c:1301: warning: dereferencing type-punned pointer will break strict-aliasing rules
+    skgesirq.c:1301: warning: dereferencing type-punned pointer will break strict-aliasing rules
+    skgesirq.c:1398: warning: dereferencing type-punned pointer will break strict-aliasing rules
+    skgesirq.c:1398: warning: dereferencing type-punned pointer will break strict-aliasing rules
+    skrlmt.c: In function 'SkRlmtInit':
+    skrlmt.c:661: warning: dereferencing type-punned pointer will break strict-aliasing rules
+    skxmac2.c: In function 'SkMacPromiscMode':
+    skxmac2.c:753: warning: dereferencing type-punned pointer will break strict-aliasing rules
+    skxmac2.c:753: warning: dereferencing type-punned pointer will break strict-aliasing rules
+    skxmac2.c: In function 'SkMacHashing':
+    skxmac2.c:803: warning: dereferencing type-punned pointer will break strict-aliasing rules
+    skxmac2.c:803: warning: dereferencing type-punned pointer will break strict-aliasing rules
+    skxmac2.c: In function 'SkMacFlushTxFifo':
+    skxmac2.c:1115: warning: dereferencing type-punned pointer will break strict-aliasing rules
+    skxmac2.c:1115: warning: dereferencing type-punned pointer will break strict-aliasing rules
+    skxmac2.c: In function 'SkMacFlushRxFifo':
+    skxmac2.c:1145: warning: dereferencing type-punned pointer will break strict-aliasing rules
+    skxmac2.c:1145: warning: dereferencing type-punned pointer will break strict-aliasing rules
+    skxmac2.c: In function 'SkXmInitPauseMd':
+    skxmac2.c:1987: warning: dereferencing type-punned pointer will break strict-aliasing rules
+    skxmac2.c:1987: warning: dereferencing type-punned pointer will break strict-aliasing rules
+    skxmac2.c: In function 'SkXmOverflowStatus':
+    skxmac2.c:4236: warning: dereferencing type-punned pointer will break strict-aliasing rules
+    skxmac2.c:4236: warning: dereferencing type-punned pointer will break strict-aliasing rules
+    skxmac2.c:4242: warning: dereferencing type-punned pointer will break strict-aliasing rules
+    skxmac2.c:4242: warning: dereferencing type-punned pointer will break strict-aliasing rules
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+    Cc: Ben Warren <biggerbadderben@gmail.com>
+
+commit 3708e4cdb1f1d3d5128cf87be040d7e6b85f60dd
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Fri Sep 11 09:13:58 2009 +0200
+
+    drivers/net/natsemi.c: fix compile warning
+
+    Fix warning: natsemi.c:757: warning: dereferencing type-punned pointer
+    will break strict-aliasing rules
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+    Cc: Ben Warren <biggerbadderben@gmail.com>
+
+commit 78d19a398778a58d7b40b0c78e026515271b1a84
+Author: Michal Simek <monstr@monstr.eu>
+Date:	Mon Sep 7 09:08:02 2009 +0200
+
+    net: emaclite: Cleanup license to be GPL compatible
+
+    Signed-off-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com>
+    Signed-off-by: Michal Simek <monstr@monstr.eu>
+
+commit 0900bee9ab9818439b2d1298fa8909a88f74ec0d
+Author: Michal Simek <monstr@monstr.eu>
+Date:	Fri Aug 14 13:41:17 2009 +0200
+
+    microblaze: Enable hush parser
+
+    With Hush parser is possible to change command line in dtb
+
+    Signed-off-by: Michal Simek <monstr@monstr.eu>
+
+commit 13916abf996b127b681ddc26664c236ded28ba7f
+Author: Michal Simek <monstr@monstr.eu>
+Date:	Thu Aug 20 22:44:02 2009 +0200
+
+    microblaze: Remove AtmarkTechno Suzaku board
+
+    Users should use microblaze-generic platform.
+    This platform is longer not supported.
+
+    Signed-off-by: Michal Simek <monstr@monstr.eu>
+
+commit 3ceba1d45d007144d10368f91ff9e36f3b5f39a1
+Author: Michal Simek <monstr@monstr.eu>
+Date:	Thu Aug 20 22:36:20 2009 +0200
+
+    net: Remove old Xilinx Emac driver
+
+    Signed-off-by: Michal Simek <monstr@monstr.eu>
+
+commit 2fddd44464d02e0f3ade06dabe0e165835fa61f0
+Author: Michal Simek <monstr@monstr.eu>
+Date:	Wed Aug 19 08:10:08 2009 +0200
+
+    microblaze: Short size of global data and fix malloc size
+
+    If is full malloc area global, data are rewrite because
+    there was bad size of malloc area.
+
+    Signed-off-by: Michal Simek <monstr@monstr.eu>
+
+commit aedb4683097d3e5de8833f4a9e34664d3d2bd077
+Author: Michal Simek <monstr@monstr.eu>
+Date:	Fri Aug 14 17:02:35 2009 +0200
+
+    microblaze: Add sbss, scommon and COMMON symbols for clearing
+
+    Signed-off-by: Michal Simek <monstr@monstr.eu>
+
+commit 4c1883670acbf1cc83c04df1876235c3aedde128
+Author: Dirk Eibach <eibach@gdsys.de>
+Date:	Wed Sep 9 12:36:07 2009 +0200
+
+    ppc4xx: Rename compactcenter to intip
+
+    Signed-off-by: Dirk Eibach <eibach@gdsys.de>
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit d1c3b27525b664e8c4db6bb173eed51bfc8220de
+Author: Stefan Roese <sr@denx.de>
+Date:	Wed Sep 9 16:25:29 2009 +0200
+
+    ppc4xx: Big cleanup of PPC4xx defines
+
+    This patch cleans up multiple issues of the 4xx register (mostly
+    DCR, SDR, CPR, etc) definitions:
+
+    - Change lower case defines to upper case (plb4_acr -> PLB4_ACR)
+    - Change the defines to better match the names from the
+      user's manuals (e.g. cprpllc -> CPR0_PLLC)
+    - Removal of some unused defines
+
+    Please test this patch intensive on your PPC4xx platform. Even though
+    I tried not to break anything and tested successfully on multiple
+    4xx AMCC platforms, testing on custom platforms is recommended.
+
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit d8d8724be06df43772162dc344ae20dfa814dc72
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Fri Sep 11 09:05:32 2009 +0200
+
+    net/bootp.c: fix compile warning
+
+    Fix warning: bootp.c:695: warning: dereferencing type-punned pointer
+    will break strict-aliasing rules
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+    Cc: Ben Warren <biggerbadderben@gmail.com>
+
+commit 51003b89816848cbe86a8fe48f970ba8b14005f5
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Fri Sep 11 08:58:11 2009 +0200
+
+    kwbimage.c: Fix compile warning when building on 64 bit systems
+
+    Fix this warning when building on 64 bit systems:
+    tools/kwbimage.c: In function 'kwbimage_checksum32':
+    tools/kwbimage.c:135: warning: format '%d' expects type 'int',
+    but argument 4 has type 'long unsigned int'
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+    Cc: Prafulla Wadaskar <prafulla@marvell.com>
+
+commit e7963772eb78a6aa1fa65063d64eab3a8626daac
+Author: Marcel Ziswiler <marcel@ziswiler.com>
+Date:	Wed Sep 9 21:11:18 2009 +0200
+
+    muas3001: remove BRG clock node fixup to use common mpc8260 code.
+
+    Signed-off-by: Marcel Ziswiler <marcel.ziswiler@noser.com>
+    Acked-by: Heiko Schocher <hs@denx.de>
+
+commit c7c1dbbf7159b38f3302b845dd97d28a543ff91b
+Author: Marcel Ziswiler <marcel@ziswiler.com>
+Date:	Wed Sep 9 21:09:00 2009 +0200
+
+    r7780mp: fix typo in Ethernet chip model number comment.
+
+    Signed-off-by: Marcel Ziswiler <marcel.ziswiler@noser.com>
+
+commit 45f89f340b4d8aa099fd022260dcb13cf3321b61
+Author: Marcel Ziswiler <marcel@ziswiler.com>
+Date:	Wed Sep 9 21:22:08 2009 +0200
+
+    ep8248: add support for device tree and secondary Ethernet interface.
+
+    Signed-off-by: Marcel Ziswiler <marcel.ziswiler@noser.com>
+
+commit aa0c7a86cd236b8193218a09e1365c8991bb5ddc
+Author: Prafulla Wadaskar <prafulla@marvell.com>
+Date:	Mon Sep 7 15:05:02 2009 +0530
+
+    mkimage: Add Kirkwood Boot Image support (kwbimage)
+
+    This patch adds support for "kwbimage" (Kirkwood Boot Image)
+    image types to the mkimage code.
+
+    For details refer to docs/README.kwbimage
+
+    This patch is tested with Sheevaplug board
+
+    Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
+    Acked-by: Ron Lee <ron@debian.org>
+
+    Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
+
+commit 7809fbb9aafd60e3a6e5dfe456ae30b93ac61338
+Author: Prafulla Wadaskar <prafulla@marvell.com>
+Date:	Mon Sep 7 14:59:09 2009 +0530
+
+    Kirkwood: Sheevaplug: Add kwimage configuration file
+
+    Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
+
+commit b029dddc9ae958b1ccf875649f52c6db396a742d
+Author: Prafulla Wadaskar <prafulla@marvell.com>
+Date:	Mon Sep 7 14:59:08 2009 +0530
+
+    mkimage: Make table_entry code global
+
+    - make get_table_entry_id() global
+    - make get_table_entry_name() global
+    - move struct table_entry to image.h
+
+    Currently this code is used by image.c only.
+
+    This patch makes this API global so it can be used by other parts of
+    code, too.
+
+    Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
+    Acked-by: Ron Lee <ron.debian.org>
+
+    Edit comments and commit message.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit f666dea8ab215c76c3c2a077ad299f90dd1ace7c
+Author: Prafulla Wadaskar <prafulla@marvell.com>
+Date:	Mon Sep 7 14:59:07 2009 +0530
+
+    mkimage: Make genimg_print_size() global
+
+    Currently it is used by image.c only, but the the function can be
+    used to support additional mkimage types like for example kwbimage,
+    so make this function globally visible.
+
+    Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
+
+    Edited commit message.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 37b801888cf73b18f78c1109140ff44e3e37914f
+Author: Prafulla Wadaskar <prafulla@marvell.com>
+Date:	Mon Sep 7 14:59:06 2009 +0530
+
+    mkimage: Include missing files in build dependency calculations
+
+    Include default_image.o and fit_image.o into the build dependency
+    calculations. This makes sure they get rebuilt if any of the headers
+    they include are modified
+
+    Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
+    Acked-by: Ron Lee <ron@debian.org>
+
+    Edited commit message.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 3a2003f61ee79ac53d20c24cc896c2637a2dfc24
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Wed Aug 19 11:42:56 2009 +0200
+
+    tools/mkimage: fix compiler warnings, use "const"
+
+    This fixes some compiler warnings:
+    tools/default_image.c:141: warning: initialization from incompatible pointer type
+    tools/fit_image.c:202: warning: initialization from incompatible pointer type
+    and changes to code to use "const" attributes in a few places where
+    it's appropriate.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 89a4d6b12fd6394898b8a454cbabeaf1cd59bae5
+Author: Prafulla Wadaskar <prafulla@marvell.com>
+Date:	Wed Aug 19 17:36:46 2009 +0530
+
+    tools: mkimage: split code into core, default and FIT image specific
+
+    This is a first step towards reorganizing the mkimage code to make it
+    easier to add support for additional images types. Current mkimage
+    code is specific to generating uImage and FIT image files, but the
+    same framework can be used to generate other image types like
+    Kirkwood boot images (kwbimage-TBD). For this, the mkimage code gets
+    reworked:
+
+    Here is the brief plan for the same:-
+    a) Split mkimage code into core and image specific support
+    b) Implement callback functions for image specific code
+    c) Move image type specific code to respective C files
+	   Currently there are two types of file generation/list
+	   supported (i.e uImage, FIT), the code is abstracted from
+	   mkimage.c/.h and put in default_image.c and fit_image.c;
+	   all code in these file is static except init function call
+    d) mkimage_register API is added to add new image type support
+    All above is addressed in this patch
+    e) Add kwbimage type support to this new framework (TBD)
+    This will be implemented in a following commit.
+
+    Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
+    Edit commit message, fix coding style and typos.
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 449609f5b11cce6beba7338bc4ce0f3345376a0b
+Author: Prafulla Wadaskar <prafulla@marvell.com>
+Date:	Sun Aug 16 05:28:19 2009 +0530
+
+    tools: mkimage: Fixed build warnings
+
+    uninitialized retval variable warning fixed
+    crc32 APIs moved to crc.h (newly added) and build warnings fixed
+
+    Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 14821d7dea8d7209f2457c3179fa6551c088ba71
+Author: Prafulla Wadaskar <prafulla@marvell.com>
+Date:	Mon Aug 10 20:44:06 2009 +0530
+
+    tools: mkimage: Makefile sorted
+
+    The tools/Makefile is sorted for all entries,
+
+    Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
+
+commit f7644c0bf3502529031657a869fa213cda5a2424
+Author: Prafulla Wadaskar <prafulla@marvell.com>
+Date:	Mon Aug 10 18:49:37 2009 +0530
+
+    tools: mkimage : bugfix returns correct value for list command
+
+    List command always return "EXIT_SUCCESS" even in case of
+    failure by any means.
+
+    This patch return 0 if list command is sucessful,
+    returns negative value reported by check_header functions
+
+    Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 511c02f611cb5afa1b8ca5980caaaabaa0de377f
+Author: Mingkai Hu <Mingkai.hu@freescale.com>
+Date:	Tue Sep 8 15:07:12 2009 +0800
+
+    mkconfig: pass the board name to board config file
+
+    Then we can handle different config targets in the board file, which
+    simplifies the top level Makefile for boards that have multiple
+    config targets.
+
+    Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
+
+commit d640ac58dbf61c769864b3fe76314306b7336cf1
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Mon Sep 7 23:52:31 2009 +0200
+
+    Remove "atmel_df_pow2" binary with "make clean"
+
+    Commit 65f6f07b added support for the atmel_df_pow2 standalone program
+    but missed to add a rule to remove it to the "clean" make target.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 0b34dbbd0b6969c98c44313b291836d9056ec40a
+Author: Stefan Roese <sr@denx.de>
+Date:	Mon Sep 7 10:52:24 2009 +0200
+
+    ppc4xx: Fix compilation warning in 4xx miiphy.c
+
+    This patch fixes the following compilation warning:
+
+    miiphy.c: In function 'emac4xx_miiphy_read':
+    miiphy.c:353: warning: dereferencing type-punned pointer will break
+    strict-aliasing rules
+
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 82379b5564819e62624a3c58fbc43f1afedf4f5f
+Author: Matthias Fuchs <matthias.fuchs@esd.eu>
+Date:	Mon Sep 7 17:00:41 2009 +0200
+
+    ppc4xx: Add CONFIG_PCI_4xx_PTM_OVERWRITE to some esd 4xx boards
+
+    Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 99bcf14d553f399148a7660b98f7acbd8cc72d80
+Author: Matthias Fuchs <matthias.fuchs@esd.eu>
+Date:	Mon Sep 7 17:00:40 2009 +0200
+
+    ppc4xx: Allow overwriting pci target registers for all 4xx boards
+
+    This patch adds the CONFIG_PCI_4xx_PTM_OVERWRITE option and replaces
+    the ugly 'if defined(BOARD1) || ... || defined(BOARDn)' construct
+    in 4xx pci code.
+
+    When CONFIG_PCI_4xx_PTM_OVERWRITE is defined the default ptm register
+    setup can be overwritten through environment variables ptm1la, ptm1ms,
+    ptm2la and ptm2ms to do application specific pci target BAR configuration.
+
+    Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit cfab2ae322a99ad55364d054054f138f51130c2a
+Author: Matthias Fuchs <matthias.fuchs@esd.eu>
+Date:	Fri Sep 4 10:37:04 2009 +0200
+
+    ppc4xx: Fix PMC405DE support
+
+    This patch fixes PMC405DE support. Patch 85d6bf0b fixed out-of-tree
+    building for this board but the loadpci object did not get linked
+    after that.
+
+    Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit c8355b9d9f778bd12ee19c8f34d88e13758a4efd
+Author: Detlev Zundel <dzu@denx.de>
+Date:	Wed Sep 2 17:24:57 2009 +0200
+
+    amcc-common.h: Use filenames from environment variables for update procedure.
+
+    Using a separate "u-boot" environment variable allows to easily
+    specify different filenames for the update procedure.  This is also in
+    line with many other board configurations defining an "update" script.
+
+    Signed-off-by: Detlev Zundel <dzu@denx.de>
+    Acked-by: Wolfgang Denk <wd@denx.de>
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 6c97a20d0b2f56cb4f3745d94b1f96986e8cced5
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Wed Sep 9 11:40:41 2009 -0500
+
+    ppc/85xx: Introduce RESET_VECTOR_ADDRESS to handle non-standard link address
+
+    Some board ports place TEXT_BASE at a location that would cause the
+    RESET_VECTOR_ADDRESS not to be at 0xfffffffc when we link.	By default
+    we assume RESET_VECTOR_ADDRESS will be 0xfffffffc if the board doesn't
+    explicitly set it.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+    Acked-by: Wolfgang Denk <wd@denx.de>
+
+commit c348322ac7f76318295cf25ffab2cc2a4900a234
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Tue Sep 8 13:46:46 2009 -0500
+
+    ppc/85xx: Clean up do_reset
+
+    There is no reason to do a run time check for e500 v1 based cores to
+    determine if we have the GUTs RSTCR facility.  Only the first generation
+    of PQ3 parts (MPC8540/41/55/60) do not have it.  So checking to see if
+    we are e500 v2 would miss future parts (like e500mc).
+
+    Just change this to be ifdef'd based on CONFIG_MPC85{40,41,55,60}.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 21170c80a83f1e60ce7f6f83005e06a5c2d15a8e
+Author: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+Date:	Thu Sep 3 19:42:40 2009 +0530
+
+    ppc/85xx/86xx: Bug fix: call to puts in probecpu() moved to checkcpu().
+
+    While in probecpu() UART is still not initialized.
+
+    Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit f8027f6b4789e3340f10620d8fb6113b95b88d9c
+Author: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+Date:	Wed Sep 2 19:40:36 2009 +0530
+
+    ppc/85xx/86xx: Device tree fixup for number of cores
+
+    Fixing the number of cores in the device tree based on the actual number of
+    cores on the system.  With this same device tree image can be used for dual
+    core and single core members of otherwise exactly same SOC.
+
+    For example:
+    * P2020RDB and P2010RDB
+    * P1020RDB and P1011RDB
+    * MPC8641D and MPC8641
+
+    Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 58442dc01e47cc8ce42af4f29486a34cad60b9d2
+Author: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+Date:	Wed Sep 2 13:35:21 2009 +0530
+
+    ppc/85xx,86xx: Handling Unknown SOC version
+
+    Incase the system is detected with Unknown SVR, let the system boot
+    with a default value and a proper message.
+
+    Now with dynamic detection of SOC properties from SVR, this is necessary
+    to prevent a crash.
+
+    Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 3e7b6c1f2db5ec31f9e7dbc3e0cbca602167a46a
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Wed Sep 2 09:03:08 2009 -0500
+
+    ppc/8xxx: Refactor code to determine if PCI is enabled & agent/host
+
+    Refactor the code into a simple bitmask lookup table that determines if
+    a given PCI controller is enabled and if its in host/root-complex or
+    agent/end-point mode.
+
+    Each processor in the PQ3/MPC86xx family specified different encodings
+    for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 5052a771cf1722c37c732f3c340775b55fbe3a22
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Wed Sep 2 09:00:50 2009 -0500
+
+    ppc/85xx: Cleanup makefile and related optional files
+
+    Cleaned up cpu/mpc85xx/Makefile to use CONFIG_* for those obvious cases
+    we have like PCI, CPM2, QE.  Also reworked it to use one line per file
+    for everything and sorted in alphabetical order.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 74c5dfd81f94a2a1f0d6990d17c491d718e8b9ea
+Author: Timur Tabi <timur@freescale.com>
+Date:	Fri Sep 4 17:05:24 2009 -0500
+
+    fsl: add register read-back to set_law()
+
+    After programming a new LAW, we should read-back the LAWAR register so that
+    we sync the writes.  Otherwise, code that attempts to use the new LAW-mapped
+    memory might fail right away.
+
+    Signed-off-by: Timur Tabi <timur@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit c7259086816405fe0eb77f4dc22e76980a040cef
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Sep 3 08:41:31 2009 -0500
+
+    ppc/85xx: Fix bug in setup_mp code
+
+    Its possible that we try and copy the boot page code out of flash into a
+    DDR location that doesn't have a TLB cover it.  For example, if we have
+    3G of DDR we typically only map the first 2G.  In the cases of 4G+ this
+    wasn't an issue since the reset page TLB mapping covered the last page
+    of memory which we wanted to copy to.
+
+    We now change the physical address of the reset page TLB to map to the
+    true physical location of the boot page code, copy and than set the
+    TLB back to its 1:1 mapping of the reset page.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit c2287af1552bd630956568d3957c370f86801b7d
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Sep 3 08:20:24 2009 -0500
+
+    ppc/85xx: Add a simple function to search the TLB
+
+    Allow us to search the TLB array based on an address.  This is useful
+    if we want to change an entry but dont know where it happens to be
+    located.
+
+    For example, the boot page mapping we use on MP or the flash TLB that
+    we change the WIMGE settings for after we've relocated.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 26f4cdba6b51deab4ec99d60be381244068ef950
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Fri Aug 14 13:37:54 2009 -0500
+
+    85xx: Add support for setting IVORs to fixed offset defaults
+
+    In future Book-E implementations IVORs will most likely go away and be
+    replaced with fixed offsets.  The IVPR will continue to exist to allow
+    for relocation of the interrupt vectors.
+
+    This code adds support to setup the IVORs as their fixed offset values
+    per the ISA 2.06 spec when we transition from u-boot to another OS
+    either via 'bootm' or a cpu release.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit da1cd955dfec35b0e15381ad1ee248fa194eed82
+Author: Dipen Dudhat <dipen.dudhat@freescale.com>
+Date:	Wed Sep 2 11:25:08 2009 +0530
+
+    ppc/85xx: Fix up eSDHC controller clock frequency in the device tree
+
+    Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 2abbd31da6d900473ed678ca50789ee58bc9bb00
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Tue Sep 1 22:01:54 2009 -0500
+
+    ppc/8xxx: Remove ddr_pd_cntl register since it doesn't exist
+
+    The ddr_pd_cntl isn't defined in any reference manual and thus we wil
+    remove especially since we set it to 0, which would most likely be its
+    POR value.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 13d46ab2572c0283d34f93bebc9a41295ef84ca5
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Tue Sep 1 21:07:08 2009 -0500
+
+    ppc/8xxx: relocate cpu pointer in global data
+
+    Now that we have a pointer to the cpu struct we need to relocate it once
+    we get into ram.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 9c671e7062720074f894ee329eaa6995b0823727
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date:	Wed Sep 2 02:17:24 2009 +0400
+
+    fsl: sys_eeprom: Fix 'may be used uninitialized' warning
+
+    The warning is bogus, so silence it by initializing the 'ret' variable.
+
+    Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+    Acked-by: Timur Tabi <timur@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 6b9ea08c5010eab5ad1056bc9bf033afb672d9cc
+Author: Dipen Dudhat <dipen.dudhat@freescale.com>
+Date:	Tue Sep 1 17:27:00 2009 +0530
+
+    ppc/85xx: Use CONFIG_FSL_ESDHC to enable sdhc clk
+
+    Enable eSDHC Clock based on generic CONFIG_FSL_ESDHC define instead of a
+    platform define.  This will enable all the 85xx platforms to use sdhc_clk
+    based on CONFIG_FSL_ESDHC.
+
+    Signed-off-by: Gao Guanhua <B22826@freescale.com>
+    Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 92477a631bbda2dc0dd2194e03f9bd3ddb8b9c21
+Author: Timur Tabi <timur@freescale.com>
+Date:	Fri Sep 4 16:28:35 2009 -0500
+
+    fsl_i2c: increase I2C timeout values and make them configurable
+
+    The value of I2C_TIMEOUT in fsl_i2c.c has several problems.  First, it is
+    defined as CONFIG_HZ/4, but it is used as a count of microseconds, so it makes
+    no sense to derive it from a clock rate.  Second, the current value (250) is
+    too low for some boards, so it needs to be increased.  Third, the timeout
+    necessary for multiple-master arbitration is larger than the timeout for basic
+    read/write operations, so we shouldn't have a single constant for both timeouts.
+    Finally, it would be nice if we could override these values on a per-board
+    basis.
+
+    Signed-off-by: Timur Tabi <timur@freescale.com>
+    Acked-by: Wolfgang Denk <wd@denx.de>
+    Tested-by: Peter Tyser <ptyser@xes-inc.com>
+    Acked-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 5da71efa18e8b4eac9afd8bfa13e3c7e7ddde1d0
+Author: Eric Millbrandt <emillbrandt@coldhaus.com>
+Date:	Thu Sep 3 08:09:44 2009 -0500
+
+    Reset i2c slave devices during init on mpc5xxx cpus
+
+    Reset any i2c devices that may have been interrupted during a system reset.
+    Normally this would be accomplished by clocking the line until SCL and SDA
+    are released and then sending a start condtiion (From an Atmel datasheet).
+    There is no direct access to the i2c pins so instead create start commands
+    through the i2c interface.	Send a start command then delay for the SDA Hold
+    time, repeat this by disabling/enabling the bus a total of 9 times.
+
+    Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
+
+commit 2d4072c06b5549444e4140231bba3d47d9b0bc53
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date:	Sat Aug 15 11:20:58 2009 -0400
+
+    ARM: DaVinci: Adding Support for DaVinci DM365 EVM
+
+    This patch adds support for the DM365 EVM.
+    It has been tested on a DM365 EVM.
+
+    Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit cf463091bce8b0f8951dd08f94754d08d64793b8
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date:	Sat Aug 15 11:20:44 2009 -0400
+
+    ARM: DaVinci: DaVinci DM365 SOC specific code
+
+    This patch adds support for DaVinci DM365 SOC.
+
+    Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit e830b66b3592f115316600d370399f3ee148e909
+Author: Ilko Iliev <iliev@ronetix.at>
+Date:	Sat Sep 5 02:51:34 2009 +0200
+
+    DM9000 init for pm9261
+
+    Signed-off-by: Ilko Iliev <iliev@ronetix.at>
+
+commit c35d7cf071f171bd6bba69f1563a6ac578a18ea6
+Author: Frederik Kriewitz <frederik@kriewitz.eu>
+Date:	Sun Aug 23 12:56:42 2009 +0200
+
+    Add support for the DevKit8000 board
+
+    This patch adds support for the DevKit8000 board.
+
+    Signed-off-by: Frederik Kriewitz <frederik@kriewitz.eu>
+
+commit 127f9ae575991aee3e105e1448c49b5b4e254998
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date:	Sun Aug 23 16:32:40 2009 +0200
+
+    omap3: move the other boards to board/
+
+    Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 350f3ac5731faf0f02ca55ab016694b7c7269f97
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date:	Sun Aug 23 16:32:39 2009 +0200
+
+    arm: move Logicpd's boards to board/logicpd/
+
+    Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 0a0e4bad9693ef1d2ca8c33ba551d395a4e3d641
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date:	Sun Aug 23 16:32:38 2009 +0200
+
+    omap: move TI's boards to board/ti/
+
+    Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 9f23ca42b3ba19b24e66fade572f2b86d929b6e8
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Fri Sep 4 23:20:29 2009 +0200
+
+    ARM: Update mach-types
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 262ae0a6193f10b6a94e86d2f752e7f5510416fa
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Thu Sep 3 23:12:47 2009 -0400
+
+    push LOAD_ADDR out to arch mk files
+
+    Rather than maintain/extend the current ifeq($(ARCH)) mess that exists in
+    the standalone Makefile, push the setting up of LOAD_ADDR out to the arch
+    config.mk (and rename to STANDALONE_LOAD_ADDR in the process).  This keeps
+    the common code clean and lets the arch do whatever crazy crap it wants in
+    its own area.
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 7662eb2b9d6fbc95ecb1fb3e5b5147215e251e7d
+Author: Giuseppe CONDORELLI <giuseppe.condorelli@st.com>
+Date:	Thu Sep 3 07:37:46 2009 -0400
+
+    zlib: fix code when DEBUG is defined
+
+    Removed stdio.h inclusion and moved trace macros to use printf avoiding to
+    write debug informations to standard error.
+
+    Signed-off-by: Giuseppe Condorelli <giuseppe.condorelli@st.com>
+
+commit cfcbf8c4cf3da96b9e3f652506b664bfd766a520
+Author: Scott Wood <scottwood@freescale.com>
+Date:	Wed Sep 2 16:45:31 2009 -0500
+
+    mxc_nand: Remove Freescale's "All Rights Reserved."
+
+    Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 001d615681333569c555e6cde07d8d23e2c536fb
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date:	Wed Sep 2 17:58:48 2009 +0400
+
+    mpc83xx/serdes: License cleanup: remove "All Rights Reserved" notice
+
+    "All Rights Reserved" conflicts with the GPL.
+
+    Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+
+commit 46ff6d461321f5b565cc790e02679237ffd9a20f
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Wed Sep 2 14:57:27 2009 +0200
+
+    License cleanup: remove unintended "All Rights Reserved" notices.
+
+    Some files included my old standerd file header which had a "All
+    Rights Reserved" part. As this has never been my intention, I remove
+    these lines to make the files compatible with GPL v.2 and later.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 37daa77f3cafb5ec9a974eff3db2af4a0560a9ef
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Wed Sep 2 10:21:20 2009 +0200
+
+    cmd_mtdparts.c: fix compiler warning in debug code
+
+    Fix warning messages:
+    cmd_mtdparts.c:1429: warning: format '%08lx' expects type 'long
+    unsigned int', but argument 6 has type 'u32'
+    cmd_mtdparts.c:1429: warning: format '%08lx' expects type 'long
+    unsigned int', but argument 7 has type 'u32'
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit d8bc55a6fb28876abcbf4a3fc3b6c3ce429c1bb3
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date:	Tue Sep 1 20:58:03 2009 +0400
+
+    Move uninitialized_var() macro from ubi_uboot.h to compiler.h
+
+    This is needed so that we could use this macro for non-UBI code.
+
+    Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+
+commit d72871e1387094972569e4b77c25e88020f7b68f
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Tue Sep 1 11:24:45 2009 -0500
+
+    arm: Remove -fno-strict-aliasing
+
+    -fno-strict-aliasing is hidding warnings.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit d6281ff0cc2ebb5d6a5c3e1021837334074f92ec
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Tue Sep 1 11:24:44 2009 -0500
+
+    ppc: Remove -fno-strict-aliasing
+
+    -fno-strict-aliasing is hidding warnings.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 795d246c278e70b4ba9868cc9f2c8fbada49d388
+Author: Eric Millbrandt <emillbrandt@coldhaus.com>
+Date:	Fri Aug 28 07:14:04 2009 -0500
+
+    galaxy5200: Add chip select region for an Epson S1D15313
+
+    Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
+
+commit 3dfad40a0459f63099e177dc15a1df39d048f860
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Aug 27 08:23:55 2009 -0500
+
+    Add ability for arch code to make changes before we boot
+
+    Added a arch_preboot_os() function that cpu specific code can implement to
+    allow for various modifications to the state of the machine right before
+    we boot.  This can be useful to setup register state to a specific
+    configuration.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 9ea005fb4428c922536fa75991ce9972304a02fb
+Author: Roy Zang <tie-fei.zang@freescale.com>
+Date:	Sat Aug 22 03:49:52 2009 +0800
+
+    Use different PBA value for E1000 PCI and PCIe cards
+
+    Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
+    Acked-by: André Schwarz <andre.schwarz@matrix-vision.de>
+
+commit 5b34a296d47b236dafbcaf1c91ae11b5aeb1ef51
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date:	Sun Aug 23 12:59:58 2009 +1000
+
+    Add PCI support to eNET board
+
+    Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit f50b619d9cb297b0125fe78dcd6f255eb0d91659
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date:	Sun Aug 23 12:59:57 2009 +1000
+
+    i386: Moved PCI from #ifdef to conditional compile for sc520 boards
+
+    Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit ed7a1b681de1e31d18d5b92e2767ae8df3241687
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date:	Sun Aug 23 12:59:56 2009 +1000
+
+    i386: Replace [read, write]_mmcr_[byte, word, long] with memory mapped structure
+
+    Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit 9b32f96b5b92ba13fdb4b5eb637734752235f260
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date:	Sun Aug 23 12:59:55 2009 +1000
+
+    Misc sc520 cdp fixups
+
+    Now that the PCI, SATA et al compile problems have been resolved, the
+    cludge that was applied to avoid them can be removed
+
+    Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit 91ee4e183cb7ac5f86e7673ead51400f19906635
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date:	Sun Aug 23 12:59:54 2009 +1000
+
+    Fixup sc520_spunk board
+
+    Primary intent is to resolve build errors for this board which has been
+    neglected for a very long time. I do not have one of these boards, so I
+    cannot test functionality
+
+    Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit 8907b8dbc5805094f1316d64737d3428b3863693
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date:	Sun Aug 23 12:59:53 2009 +1000
+
+    Misc ds1722 fixups
+
+    This patch is based on a patch submitted by Jean-Christophe PLAGNIOL-VILLARD
+    on 18th May 2008 as part of a general i386 / sc520 fixup which was never
+    applied
+
+    Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit a92510e7fae523145b58765cdc46110f1162260d
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date:	Sun Aug 23 12:59:52 2009 +1000
+
+    Misc ti_pci1410a fixups
+
+    Removed do_pinit() - now declared in cmd_pcmcia.c
+
+    Added #define CONFIG_CMD_PCMCIA around pcmcia_off() in line with other
+    PCMCIA drivers
+
+    signed/unsigned type fixups
+
+    Added semi-colon after default: label as required by newer gcc
+
+    The only board that appears to use this driver is the sc520_spunk which
+    is very old and very likely very broken anyway. I do not have one to test
+    whether this patch breaks anything functionaly, I have can only check
+    that it compiles without warning or error
+
+    Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit 31b9ab33d93d88ff89f3046aa45c68667a378a56
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date:	Sun Aug 23 12:59:51 2009 +1000
+
+    Misc SATA fixups
+
+    Cast first parameter to sata_cpy()
+
+    In /drivers/block/ata_piix.h, ata_id_has_lba48(), ata_id_has_lba(),
+    ata_id_has_dma(), ata_id_u32(), ata_id_u64() are all defined in
+    include/libata.h which is included in ata.h which is included by all files
+    which include ata_piix.h (only ata_piix.c) so these definitions are
+    supurflous to (and conlict with) this in libata.h. Interestingly, my
+    compiler complains about ata_id_u64 already being defined, but not
+    ata_id_u32
+
+    ata_dump_id() is defined in include/libata.h and should not be static
+    (maybe should even use ata_dump_id() in libata.c
+
+    Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit d7549024098af093785151261266a02be19af633
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date:	Sun Aug 23 12:59:50 2009 +1000
+
+    i386: Misc PCI fixups
+
+    Change PCI_REGION_MEMORY to PCI_REGION_SYS_MEMORY (Originally done in
+    commit ff4e66e93c1a, regressed by commit 6d7f610b09f8)
+
+    Cast PCI_ROM_ADDRESS_MASK to u32
+
+    Wrap probe_pci_video() call inside #ifdef CONFIG_VIDEO
+
+    Change call to pci_find_class() to pci_find_devices(). This is based on a
+    patch submitted on 1st March 2007 (Patch that fixes the compilation errors
+    for sc520_cdp board) by mushtaq_k
+
+    This patch requires that PCI_VIDEO_VENDOR_ID and PCI_VIDEO_DEVICE_ID be
+    specified in the board config file.  Dummy values have been added for the
+    SC520 CDP board to enable compilation, but since I do not have one of these,
+    I do know what the values should be
+
+    Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit 04ff9ab158714d43cdf2f4f6f0235c3ea9d241a2
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date:	Sun Aug 23 12:59:49 2009 +1000
+
+    Fix sc520 timer interrupt generation
+
+    The current implementation has the timer being started before the interrupt
+    handler is installed. It the interrupt occurs before the handler is
+    installed, the timer interrupt is never reset and the timer stops
+
+    Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit f3a8d6b29b1cd01fdd940e8ff7a62b1df0ebbf82
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date:	Sun Aug 23 12:59:48 2009 +1000
+
+    Fix environment configuration for eNET board
+
+    The current configuration of the Environment has the redundant copy of the
+    environment in the Boot Flash - This was never the intent. The Environment
+    should instead be in the first two sectors of the first Strata Flash
+
+    Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit ea0c37798c3823fdd77edfffd27b20191f8ca1f0
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date:	Sun Aug 23 12:59:47 2009 +1000
+
+    i386: Fix regression introduced by commit 8c63d47651f7
+
+    A local variable was deleted that should not have been
+
+    Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit cfb3a736ffcff3e3753b902cad536f22fcf8961d
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date:	Sun Aug 23 12:59:46 2009 +1000
+
+    i386: Change inline asm global symbols to local
+
+    gcc 4.3.2 optimiser creates multiple copies of inline asm (who knows why)
+    Remove use of global names for labels to prevent 'symbol already defined'
+    errors
+
+    Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit a3ab8caee696a1d53fc82fa321e2b2f179970168
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date:	Sun Aug 23 12:59:45 2009 +1000
+
+    i386: Add errno.h
+
+    Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit d4e8ada0f6d51e0e3b80790fb9375ac8910f5352
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Fri Aug 21 23:05:21 2009 -0500
+
+    Consolidate arch-specific mem_malloc_init() implementations
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit a483a167bc8d808145ca1224a2c238cda90aa60c
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Fri Aug 21 23:05:20 2009 -0500
+
+    Standardize mem_malloc_init() implementation
+
+    This lays the groundwork to allow architectures to share a common
+    mem_malloc_init().
+
+    Note that the x86 implementation was not modified as it did not fit the
+    mold of all other architectures.
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 5e93bd1c9aaea886c5e5c7c1b6114ab36c30668f
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Fri Aug 21 23:05:19 2009 -0500
+
+    Consolidate arch-specific sbrk() implementations
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 65f6f07b72a71b83d775c4d20d7ebcd6b2d2086d
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Thu Jul 23 16:37:03 2009 -0400
+
+    atmel_df_pow2: standalone to convert dataflashes to pow2
+
+    Atmel DataFlashes by default operate with pages that are slightly bigger
+    than normal binary sizes (i.e. many are 1056 byte pages rather than 1024
+    bytes).  However, they also have a "power of 2" mode where the pages show
+    up with the normal binary size.  The latter mode is required in order to
+    boot with a Blackfin processor, so many people wish to convert their
+    DataFlashes on their development systems to this mode.  This standalone
+    application does just that.
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit cb95c7a935ab9b52dac5d08e5ba4007c5a480f97
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Wed Sep 2 05:52:37 2009 -0400
+
+    Blackfin: cm-bf548: fix device->stdio_dev fallout
+
+    The recent 52cb4d4fb348 commit which renamed device to stdio_dev missed the
+    cm-bf548's video board.
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit c7bcdde46a7ef78628f0f09fdc6cb61bb1bd7e79
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Wed Sep 2 04:21:16 2009 -0400
+
+    Blackfin: enable 64bit printf for nand
+
+    Since the NAND code now uses 64bit code, make sure we enable support for
+    ADI Blackfin boards in printf to avoid the warning:
+    nand_util.c:45:2: warning: #warning Please define CONFIG_SYS_64BIT_VSPRINTF for correct output!
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 9c46e71af2b03ccd721c56b1dc906ead702d6fb5
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Mon Aug 24 20:48:04 2009 -0400
+
+    Blackfin: use scratch pad for exception stack
+
+    If the memory layout pushes the stack out of the default DCPLB coverage,
+    the exception handler may trigger a double fault by trying to push onto
+    the uncovered stack.  So handle the exception stack similar to the kernel
+    by using the top of the scratch pad SRAM.
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 69a25ce3578f34c8accb476f70089f3a44b78ed9
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Mon Aug 24 20:36:25 2009 -0400
+
+    Blackfin: increase default console size
+
+    The default console size indirectly applies to length of env vars, so a
+    smaller length makes it hard to pass longer command lines to kernels.
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit f541e1d6d99c22bbd4bc8c84fdb02baad0277847
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Mon Aug 24 19:03:18 2009 -0400
+
+    Blackfin: fix debug printf modifiers
+
+    The display_global_data() function generated warnings with pretty much
+    every variable.
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 4640c2b8699bcdd2346a2c633486f07f061a2939
+Author: Harald Krapfenbauer <Harald.Krapfenbauer@bluetechnix.at>
+Date:	Thu Aug 20 19:20:41 2009 -0400
+
+    Blackfin: cm-bf537u: new board port
+
+    The CM-BF537U is similar to the CM-BF537E module, but enough to need its
+    own board port.
+
+    Signed-off-by: Harald Krapfenbauer <Harald.Krapfenbauer@bluetechnix.at>
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit c4db335c2e0805e1ce4c33d278b77492c0812353
+Author: Robin Getz <robin.getz@analog.com>
+Date:	Mon Aug 17 15:23:02 2009 +0000
+
+    Blackfin: change global data register from P5 to P3
+
+    Since the Blackfin ABI favors higher scratch registers by default, use the
+    last scratch register (P3) for global data rather than the first (P5).
+    This allows the compiler's register allocator to use higher number scratch
+    P registers, which in turn better matches the Blackfin instruction set,
+    which reduces the size of U-Boot by more than 1024 bytes...
+
+    Signed-off-by: Robin Getz <robin.getz@analog.com>
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 574b70df03fba0ea635e2fe71fbd7b97d19b706a
+Author: Robin Getz <robin.getz@analog.com>
+Date:	Tue Aug 11 14:20:13 2009 +0000
+
+    Blackfin: enable more network commands for ADI dev boards
+
+    Add dns and ntp to default networking commands, and ask for more dhcp
+    options to better configure the network environment.
+
+    Signed-off-by: Robin Getz <robin.getz@analog.com>
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit aa7b248a05323d4720969227603e39a22777ed95
+Author: Michael Hennerich <michael.hennerich@analog.com>
+Date:	Thu Jun 18 09:12:50 2009 +0000
+
+    Blackfin: bf537-stamp: comment CF-Flash Card Support better
+
+    Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 69c6d268a29cf6d61e096d815abf5abf24136f45
+Author: Robin Getz <robin.getz@analog.com>
+Date:	Fri Jul 10 18:37:15 2009 +0000
+
+    Blackfin: use +(filesize) to make sure we are only doing what is necessary
+
+    Signed-off-by: Robin Getz <robin.getz@analog.com>
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 2dc851e3b0f07a56f83060f13882ff4b62cf5112
+Author: Albin Tonnerre <albin.tonnerre@free-electrons.com>
+Date:	Thu Aug 20 16:04:49 2009 +0200
+
+    Support for the Calao TNY-A9260/TNY-A9G20 boards
+
+    The Calao TNY-A9260 and TNY-9G20 are boards manufactured and sold by
+    Calao Systems <http://www.calao-systems.com>. Their components are very
+    similar to the AT91SAM9260EK board, so their configuration is based on
+    the configuration of this board. There are however some differences:
+    different clocks, no LCD, no ethernet. They also can use SPI EEPROM to
+    store the environment.
+
+    Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
+    Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 49d2cb4d6153a6c18249dccb5de5cffeb261a61c
+Author: Prafulla Wadaskar <prafulla@marvell.com>
+Date:	Thu Aug 20 20:59:28 2009 +0530
+
+    arm: Kirkwood: add SYSRSTn Duration Counter Support
+
+    This feature can be used to trigger special command "sysrstcmd" using
+    reset key long press event and environment variable "sysrstdelay" is set
+    (useful for reset to factory or manufacturing mode execution)
+
+    Kirkwood SoC implements a hardware-based SYSRSTn duration counter.
+    When SYSRSTn is asserted low, a SYSRSTn duration counter is running.
+    The counter value is stored in the SYSRSTn Length Counter Register
+    The counter is based on the 25-MHz reference clock (40ns)
+    It is a 29-bit counter, yielding a maximum counting duration of
+    2^29/25 MHz (21.4 seconds). When the counter reach its maximum value,
+    it remains at this value until counter reset is triggered by setting
+    bit 31 of KW_REG_SYSRST_CNT
+
+    Implementation:
+    Upon long reset assertion (> ${sysrstdelay} in secs) sysrstcmd will be
+    executed if pre-defined in environment variables.
+    This feature will be disabled if "sysrstdelay" variable is unset.
+
+    for-ex.
+    setenv sysrst_cmd "echo starting factory reset;
+		   nand erase 0xa0000 0x20000;
+		   echo finish ed sysrst command;"
+    will erase particular nand sector if triggered by this event
+
+    Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
+
+commit 9453967e28c5e3abbf856f95735ea69bae1e77fa
+Author: Albin Tonnerre <albin.tonnerre@free-electrons.com>
+Date:	Mon Aug 24 18:03:26 2009 +0200
+
+    Add support for the Calao SBC35-A9G20 board
+
+    The Calao SBC35-A9G20 board is manufactured and sold by Calao Systems
+    <http://www.calao-systems.com>. It is built around an AT91SAM9G20 ARM SoC
+    running at 400MHz. It features an Ethernet port, an SPI RTC backed by an onboard
+    battery , an SD/MMC slot, a CompactFlash slot, 64Mo of SDRAM, 256Mo of NAND
+    flash, two USB host ports, and an USB device port. More informations can be
+    found at <http://www.calao-systems.com/articles.php?lng=en&pg=5936>
+
+    Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
+
+commit 10bc241dfc15a0820d9c52469173b7ccafec0b84
+Author: Ilya Yanok <yanok@emcraft.com>
+Date:	Tue Aug 11 02:32:09 2009 +0400
+
+    imx27lite: add support for imx27lite board from LogicPD
+
+    This patch adds support for i.MX27-LITEKIT development board from
+    LogicPD. This board uses i.MX27 SoC and has 2MB NOR flash, 64MB NAND
+    flash, FEC ethernet controller integrated into i.MX27.
+
+    Signed-off-by: Ilya Yanok <yanok@emcraft.com>
+    Acked-by: Wolfgang Denk <wd@denx.de>
+
+commit 50b5fff55827946c86a60db8b21a9358be720666
+Author: Albin Tonnerre <albin.tonnerre@free-electrons.com>
+Date:	Tue Sep 1 11:26:20 2009 +0200
+
+    at91sam9260/afeb9260: Fix SPI initialization
+
+    Commit 7ebafb7ec1a0285af8380623c009576f92583b98 introduced a mistake in the spi
+    init function call for those boards. This patch fixes this.
+
+    Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
+
+commit f3d4f8870e69e0fd177397778d97d0751bbd020a
+Author: Simon Kagstrom <simon.kagstrom@netinsight.net>
+Date:	Tue Aug 18 11:13:44 2009 +0200
+
+    Remove duplicate set_cr
+
+    Remove duplicate set_cr
+
+    set_cr is defined in both asm-arm/proc-armv/system.h and
+    include/asm-arm/system.h. This patch removes it (and some duplicate
+    defines) from the former.
+
+    Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
+
+commit 3d35d87d5482de23cd5dc4d7721b1086107cae50
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Mon Aug 31 19:57:42 2009 +0200
+
+    Prepare 2009.08
+
+    Update CHANGELOG
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
 commit 632a6dd0b612eb7b143f789f2a0273917468c041
 Author: Andre Schwarz <andre.schwarz@matrix-vision.de>
 Date:	Mon Aug 31 16:18:24 2009 +0200
@@ -26,6 +5445,385 @@ Date:	Sun Aug 30 11:05:29 2009 -0700
 
     Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
 
+commit 2d04db088e6df8a008bb09f604876a45031df93b
+Author: Timur Tabi <timur@freescale.com>
+Date:	Fri Aug 28 16:56:45 2009 -0500
+
+    fsl: simplify the "mac id" command, improve boot-time informational message
+
+    The "mac id" command took a 4-character parameter as the identifier string.
+    However, for any given board, only one kind of identifier is acceptable, so it
+    makes no sense to ask the user to type it in.  Instead, if the user enters
+    "mac id", the identifier (and also the version, if it's NXID) will
+    automatically be set to the correct value.
+
+    Improve the message that is displayed when EEPROM is read during boot.  It now
+    displays "EEPROM:" and then either an error message or the EEPROM identifier
+    if successful.
+
+    If the identifier in EEPROM is valid, then always reject a bad CRC, even if the
+    CRC field has not been initialized.
+
+    Don't force the MAC address count to MAX_NUM_PORTS or less.  Forcing the value
+    to be changed resulting in an in-memory copy that does not match what's in
+    hardware, even though the user did not request that change.
+
+    Finally, always update the CRC value in the in-memory copy after any field
+    is changed, so that the CRC is always correct.
+
+    Signed-off-by: Timur Tabi <timur@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 33f3f34255bd7cf0be502275c59f0ff22dc50080
+Author: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+Date:	Fri Aug 21 07:29:58 2009 +0530
+
+    85xx: Added PCIe support for P1 P2 RDB
+
+    Call fsl_pci_init_port() to initialize all the PCIe ports on the board.
+
+    Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 0d3d68b25a8e7790f58530ddccbd61f9fc0245ef
+Author: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+Date:	Fri Aug 21 07:29:42 2009 +0530
+
+    driver/fsl_pci: Add fsl_pci_init_port function to initialize a PCI controller
+
+    fsl_pci_init_port can be called from board specific PCI initialization
+    routines to setup the PCI (or PCIe) controller.  This will reduce code
+    redundancy in most of the 85xx/86xx FSL board ports that setup PCI.
+
+    Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 05f6f66474312ad03c39b4ca4875af46c87366bf
+Author: Timur Tabi <timur@freescale.com>
+Date:	Thu Aug 20 17:41:11 2009 -0500
+
+    85xx: Improve MPIC initialization
+
+    The MPIC initialization code for Freescale e500 CPUs was not using I/O
+    accessors, and it was not issuing a read-back to the MPIC after setting
+    mixed mode.  This may be the cause of a spurious interrupt on some systems.
+
+    Signed-off-by: Timur Tabi <timur@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit c17b79fbd0c7923948331d65cb588734a9c681ff
+Author: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+Date:	Thu Aug 20 18:59:18 2009 +0530
+
+    85xx: Added support for P1011RDB and P2010RDB
+
+    P1011 and P2010 are single core variants of P1010 and P2020 respectively.
+    The board(RDB) will be same.
+
+    Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit a713ba926b45da9a6f923f1ac9e60a66852e5f2d
+Author: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+Date:	Thu Aug 20 18:57:45 2009 +0530
+
+    85xx: Added single core members of FSL P1xx/P2xx processors series
+
+    P1011 - Single core variant of P1020
+    P2010 - Single core variant of P2020
+
+    Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit bf488bc0949fc900d1296a7f35a38a6a28cb5fab
+Author: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+Date:	Thu Aug 20 18:57:02 2009 +0530
+
+    85xx: P1020RDB Support Added
+
+    Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 3b1f243b8dad30a646a0f056b0268519eadbc3c5
+Author: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+Date:	Thu Aug 20 18:55:35 2009 +0530
+
+    85xx: Added CONFIG_MAX_CPUS for P1020
+
+    Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 76b474e2f5a223fcabfeaa4f1c8fb699062b986c
+Author: Mingkai Hu <Mingkai.hu@freescale.com>
+Date:	Tue Aug 18 15:37:15 2009 +0800
+
+    85xx: Add L2SRAM Register's macro definition
+
+    Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 158c6724c99368a4d8eef11ee7e3c7ad0ef03a15
+Author: Felix Radensky <felix@embedded-sol.com>
+Date:	Sat Aug 15 15:08:37 2009 +0300
+
+    85xx: Fix memory test range on MPC8536DS
+
+    With current values of CONFIG_SYS_MEMTEST_START and CONFIG_SYS_MEMTEST_END
+    memory test hangs if run without arguments. Set them to sane values, so
+    that all available 512MB of RAM excluding exception vectors at the bottom
+    and u-boot code and stack at the top can be tested.
+
+    Signed-off-by: Felix Radensky <felix@embedded-sol.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit ef41f2a25c554604156b59f5945feadae2f3cb55
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Wed Aug 12 00:10:44 2009 -0500
+
+    85xx: Removed BEDBUG support on P1_P2_RDB
+
+    To match all other 85xx platforms we are removing BEDBUG support.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit b560ab85edfb68da653bf2527c390c3e182392a1
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Sat Aug 8 10:42:30 2009 -0500
+
+    85xx: Init pci ethernet cards if we enable any on MPC8572DS
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 1bb61b69f7aba4931ede35fdcabd8e5ecad121d7
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Fri Aug 7 13:16:34 2009 -0500
+
+    xes: Use proper IO access functions
+
+    Also fix some minor whitespace oddities while we're cleaning up
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit ec79d33b2c41ee8b6d1354cc0910217b769c5036
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Fri Aug 7 13:00:55 2009 -0500
+
+    85xx: Move to a common linker script
+
+    There are really no differences between all the 85xx linker scripts so
+    we can just move to a single common one.  Board code is still able to
+    override the common one if need be.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 87c7661b42aa7672539b54b51d3d5c4013ec6f6c
+Author: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+Date:	Fri Jul 31 12:08:27 2009 +0530
+
+    85xx: Added P1020 Processor Support.
+
+    P1020 is another member of QorIQ series of processors which falls in ULE
+    category. It is an e500 based dual core SOC.
+
+    Being a scaled down version of P2020 it has following differences:
+    - 533MHz - 800MHz core frequency.
+    - 256Kbyte L2 cache
+    - Ethernet controllers with classification capabilities.
+    Also the SOC is pin compatible with P2020
+
+    Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 728ece343e8bb2a66ee977c49d455439e3b28da9
+Author: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+Date:	Wed Aug 5 13:29:24 2009 +0530
+
+    85xx: Add support for P2020RDB board
+
+    The code base adds P1 & P2 RDB platforms support.
+    The folder and file names can cater to future SOCs of P1/P2 family.
+    P1 & P2 processors are 85xx platforms, part of Freescale QorIQ series.
+
+    Tested following on P2020RDB:
+    1. eTSECs
+    2. DDR, NAND, NOR, I2C.
+
+    Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 0e870980a64584a591af775bb9c9fe9450124df9
+Author: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+Date:	Fri Jul 31 12:08:14 2009 +0530
+
+    8xxx: Removed CONFIG_NUM_CPUS from 85xx/86xx
+
+    The number of CPUs are getting detected dynamically by checking the
+    processor SVR value.  Also removed CONFIG_NUM_CPUS references from all
+    the platforms with 85xx/86xx processors.
+
+    This can help to use the same u-boot image across the platforms.
+
+    Also revamped and corrected few Freescale Copyright messages.
+
+    Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 18bacc2027f8531d8dec15ba8da3242dfb4e63f3
+Author: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+Date:	Fri Jul 31 12:07:45 2009 +0530
+
+    8xxx: Refactored common cpu specific code for 85xx/86xx into one file.
+
+    Removed same code pieces from cpu/mpc85xx/cpu.c and cpu/mpc86xx/cpu.c
+    and moved to cpu/mpc8xxx/cpu.c(new file)
+
+    Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 7b18c227b847e4782eb1492219ebd555f521b08b
+Author: Alex Dubov <oakad@yahoo.com>
+Date:	Fri Aug 7 15:28:32 2009 +1000
+
+    stx: create common vendor/board hierarchy for STx boards
+
+    Move files belonging to the STx boards into common vendor directory and
+    update the Makefile to reflect this.
+
+    Signed-off-by: Alex Dubov <oakad@yahoo.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit bafdf9aa9dbb69d937b72db17ed5800998c59523
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date:	Tue Aug 4 17:38:00 2009 -0500
+
+    85xx: Remove unused CONFIG_CLEAR_LAW0 defines
+
+    Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 73aacc522849486b60a5611f678f0bf1c3053779
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Aug 6 18:38:43 2009 -0500
+
+    86xx: Remove redudant PLATFORM_CPPFLAGS
+
+    For historic reasons we had defined some additional PLATFORM_CPPFLAGS like:
+
+    PLATFORM_CPPFLAGS += -DCONFIG_MPC86xx=1
+    PLATFORM_CPPFLAGS += -DCONFIG_MPC8641=1
+
+    However these are all captured in the config.h and thus redudant.  Also
+    moved common 86xx flags into cpu/mpc86xx/config.mk.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 53efa1f1acacacb76fa9a21b09b3294783a11c03
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Aug 6 18:28:34 2009 -0500
+
+    85xx: Remove redudant PLATFORM_CPPFLAGS
+
+    For historic reasons we had defined some additional PLATFORM_CPPFLAGS
+    like:
+
+    PLATFORM_CPPFLAGS += -DCONFIG_E500=1
+    PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1
+    PLATFORM_CPPFLAGS += -DCONFIG_MPC8548=1
+
+    However these are all captured in the config.h and thus redudant.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 337f9fde2e9317c1d9e85a4a8955a2f14730a00f
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Jul 30 15:54:07 2009 -0500
+
+    85xx: Add a 36-bit physical configuration for MPC8536DS
+
+    We move all IO addressed (CCSR, localbus, PCI) above the 4G boundary
+    to allow for larger memory sizes.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+    Acked-by: Wolfgang Denk <wd@denx.de>
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit ecead84d56b0ced67b727f5ce21ba08c53b5f09e
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Tue Aug 4 09:10:03 2009 -0500
+
+    85xx: Cleanup whitespace in mpc8536ds.c
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit ad19e7a5d2de337064ce7728d6504df9648f5d31
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Wed Aug 5 07:59:35 2009 -0500
+
+    pci/fsl_pci_init: Rework PCI ATMU setup to handle >4G of memory
+
+    The old PCI ATMU setup code would just mimic the PCI regions into the
+    ATMU registers.  For simple memory maps in which all memory, MMIO, etc
+    space fit into 4G this works ok.  However there are issues with we have
+    >4G of memory as we know can't access all of memory and we need to
+    ensure that PCICSRBAR (PEXCSRBAR on PCIe) isn't overlapping with
+    anything since we can't turn it off.
+
+    We first setup outbound windows based on what the board code setup
+    in the pci regions for MMIO and IO access.	Next we place PCICSRBAR
+    below the MMIO window.  After which we try to setup the inbound windows
+    to map as much of memory as possible.
+
+    On PCIe based controllers we are able to overmap the ATMU setup since
+    RX & TX links are separate but report the proper amount of inbound
+    address space to the region tracking to ensure there is no overlap.
+
+    On PCI based controllers we use as many inbound windows as available to
+    map as much of the memory as possible.
+
+    Additionally we changed all the CCSR register access to use proper IO
+    accessor functions.  Also had to add CONFIG_SYS_CCSRBAR_PHYS to some
+    86xx platforms that didn't have it defined.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 8295b94400449586505ffe34ec024feb3d2c8fe4
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Wed Aug 5 07:49:27 2009 -0500
+
+    pci/fsl_pci_init: Use PCIe capability to determine if controller is PCIe
+
+    Change the code to use the PCIe capabilities register to determine if we
+    are a PCIe controller or not.  Additionally cleaned up some white space
+    and formatting in the file.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit cb151aa2cf5fbb1e412fc763a3a611758f066238
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Mon Aug 3 21:02:02 2009 -0500
+
+    pci/fsl_pci_init: Fold fsl_pci_setup_inbound_windows into fsl_pci_init
+
+    Every platform that calls fsl_pci_init calls fsl_pci_setup_inbound_windows
+    before it calls fsl_pci_init.  There isn't any reason to just call it
+    from fsl_pci_init and simplify things a bit.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit fb3143b35eb5890ec72e79d17a6068a84a057d47
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Mon Aug 3 20:44:55 2009 -0500
+
+    pci/fsl_pci_init: Fold pci_setup_indirect into fsl_pci_init
+
+    Every platform that calls fsl_pci_init calls pci_setup_indirect before
+    it calls fsl_pci_init.  There isn't any reason to just call it from
+    fsl_pci_init and simplify things a bit.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
 commit 28887d831b02c66ccc10d7f1379204b5a62f4543
 Author: André Schwarz <andre.schwarz@matrix-vision.de>
 Date:	Thu Aug 27 14:48:35 2009 +0200
@@ -59,6 +5857,283 @@ Date:	Wed Aug 26 21:25:46 2009 -0500
 
     Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
 
+commit 77b351cd0f20483eefa09bebebb3e0cbf5555b2c
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date:	Tue Aug 18 10:10:42 2009 -0400
+
+    NAND: DaVinci: V2 Adding 4 BIT ECC support
+
+    This patch adds 4 BIT ECC support in the DaVinci NAND
+    driver. Tested on both the DM355 and DM365.
+
+    Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+    Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit f83b7f9e8a5d1334e24506ea5953dd871596ea8a
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date:	Mon Aug 10 13:27:56 2009 -0400
+
+    MTD:NAND: ADD new ECC mode NAND_ECC_HW_OOB_FIRST
+
+    This patch adds the new mode NAND_ECC_HW_OOB_FIRST in the nand code to
+    support 4-bit ECC on TI DaVinci devices with large page (up to 2K) NAND
+    chips.  This ECC mode is similar to NAND_ECC_HW, with the exception of
+    read_page API that first reads the OOB area, reads the data in chunks,
+    feeds the ECC from OOB area to the ECC hw engine and perform any
+    correction on the data as per the ECC status reported by the engine.
+
+    This patch has been accepted by Andrew Morton and can be found at
+
+    http://userweb.kernel.org/~akpm/mmotm/broken-out/mtd-nand-add-new-ecc-mode-ecc_hw_oob_first.patch
+
+    Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+    Signed-off-by: Sneha Narnakaje <nsnehaprabha@ti.com>
+    Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 36fab997d85d89ee7fd2c7fd6057fab786d556aa
+Author: Ilya Yanok <yanok@emcraft.com>
+Date:	Tue Aug 11 02:32:54 2009 +0400
+
+    mxc_nand: add nand driver for MX2/MX3
+
+    Driver for NFC NAND controller found on Freescale's MX2 and MX3
+    processors. Ported from Linux. Tested only with i.MX27 but should
+    works with other MX2 and MX3 processors too.
+
+    Signed-off-by: Ilya Yanok <yanok@emcraft.com>
+    Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit a2c65b47effcb3d0aa23e58596538acd338ac7c5
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date:	Mon Aug 10 13:27:46 2009 -0400
+
+    NAND: ADD page Parameter to all read_page/read_page_raw API's
+
+    This patch adds a new "page" parameter to all NAND read_page/read_page_raw
+    APIs.  The read_page API for the new mode ECC_HW_OOB_FIRST requires the
+    page information to send the READOOB command and read the OOB area before
+    the data area.
+
+    This patch has been accepted by Andrew Morton and can be found at
+    http://userweb.kernel.org/~akpm/mmotm/broken-out/mtd-nand-add-page-parameter-to-all-read_page-read_page_raw-apis.patch
+
+    WE would like this to become part of the u-boot GIT as well
+
+    Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+    Signed-off-by: Sneha Narnakaje <nsnehaprabha@ti.com>
+    Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit de4250929f37e6c16860741b74546bedbe0bdaba
+Author: Heiko Schocher <hs@denx.de>
+Date:	Tue Jul 21 17:13:40 2009 +0200
+
+    83xx, kmeter1: added NAND support
+
+    Signed-off-by: Heiko Schocher <hs@denx.de>
+    Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit ecad289fc6bd9d89ef4d5093cc7b6fd712fd0d29
+Author: Kyungmin Park <kmpark@infradead.org>
+Date:	Tue Jul 21 11:58:04 2009 +0900
+
+    OneNAND: Remove unused read_spareram
+
+    Remove unused read_spareram and add unlock_all as kernel does
+
+    Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
+    Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 403ce1f759b5acec8514cd7e10ce76704fed519c
+Author: Matthias Kaehlcke <matthias@kaehlcke.net>
+Date:	Thu Jul 16 21:19:29 2009 +0200
+
+    KB9202: Add NAND support
+
+    Add KB9202 NAND driver
+
+    Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
+    Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit ce3277a6f2c082f39596d3d3d88dd0a5bc91439d
+Author: Kyungmin Park <kmpark@infradead.org>
+Date:	Tue Jul 21 11:58:04 2009 +0900
+
+    OneNAND: Remove unused read_spareram
+
+    Remove unused read_spareram and add unlock_all as kernel does
+
+    Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
+
+commit 0d042037b3cf8693ea0f793d0c292430bfc5a95c
+Author: Eric Millbrandt <emillbrandt@coldhaus.com>
+Date:	Tue Aug 25 10:30:26 2009 -0500
+
+    galaxy5200: Cleanup typo and trailing whitespace
+
+    Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
+
+commit f6a309080b2da9e509b5ee8d091dca5e175415b7
+Author: TsiChung Liew <tsicliew@gmail.com>
+Date:	Wed Jul 22 18:42:45 2009 +0000
+
+    ColdFire: Fix compile warning messages
+
+    Change %08lX to %08X in board.c. Remove unused variable
+    'oscillator' in mcf5227x/cpu_init.c and 'scm2' in
+    mcf532x/cpu_init.c. Provide argument type cast in
+    drivers/dma/MCD_dmaApi.c.
+
+    Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
+
+commit 88c811b153771a3d1bfe958297c69722efb278e9
+Author: TsiChung Liew <tsicliew@gmail.com>
+Date:	Wed Jul 22 16:32:39 2009 +0000
+
+    ColdFire: Fix missing _IO_BASE which caused compile error
+
+    The compile error was caused by a recent patch. Affected platforms -
+    M5253DEMO.h, M5253EVBE.h, and M54455EVB.h. Adding the _IO_BASE
+    automatically defined to 0 in asm-m68k/io.h if it isn't set in
+    platform configuration file.
+
+    Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
+
+commit 3a7b2c21fb08b022e3e624cd071002b4aaed1606
+Author: Niklaus Giger <niklaus.giger@member.fsf.org>
+Date:	Wed Jul 22 17:13:24 2009 +0200
+
+    Support up to 7 banks for ids as specified in JEDEC JEP106Z
+
+    see http://www.jedec.org/download/search/jep106Z.pdf
+    Add some second source legacy flash chips 256x8.
+
+    Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 0d071cdd782e917b43e04869843df31670231ffd
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date:	Mon Aug 24 14:32:26 2009 -0500
+
+    net: tsec - handle user interrupt while waiting for PHY auto negotiation to complete
+
+    if you don't have firmware installed for the PHY to come to life, this
+    wait can be painful - let's give the option to avoid it if we want.
+
+    Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+    Acked-by: Andy Fleming <afleming@freescale.com>
+    Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 4fccb818e7ee1190602e79aa5729a23bc349bf0c
+Author: Robin Getz <rgetz@blackfin.uclinux.org>
+Date:	Thu Aug 20 10:50:20 2009 -0400
+
+    Add Transfer Size Option to tftp
+
+    Optionally add RFC 2349 "Transfer Size Option", so we can minimize the
+    time spent sending data over the UART (now print a single line during a
+    tftp transfer).
+
+     - If turned on (CONFIG_TFTP_TSIZE), U-Boot asks for the size of the file.
+     - if receives the file size, a single line (50 chars) are printed.
+	 one hash mark == 2% of the file downloaded.
+     - if it doesn't receive the file size (the server doesn't support RFC
+	 2349, prints standard hash marks (one mark for each UDP frame).
+
+    Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org>
+    Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 488feef85229c08cd3aa1fa183bc8f483d2ae832
+Author: Robin Getz <rgetz@blackfin.uclinux.org>
+Date:	Mon Aug 24 10:33:39 2009 -0400
+
+    Add debug message for Blackfin Ethernet Rx function.
+
+    Add a simple print for the Blackfin's Ethernet Rx function,
+    so we can debug incomming Ethernet functions easier.
+
+    Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org>
+    Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit b1c0eaac110bc919e5b4e88821348e714493f266
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date:	Tue Aug 25 13:09:37 2009 -0700
+
+    Convert CS8900 Ethernet driver to CONFIG_NET_MULTI API
+
+    All in-tree boards that use this controller have CONFIG_NET_MULTI added
+    Also:
+      - changed CONFIG_DRIVER_CS8900 to CONFIG_CS8900
+      - changed CS8900_BASE to CONFIG_CS8900_BASE
+      - changed CS8900_BUS?? to CONFIG_CS8900_BUS??
+      - cleaned up line lengths
+      - modified VCMA9 command function that accesses the device
+      - removed MAC address initialization from lib_arm/board.c
+
+    Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+    Tested-by: Wolfgang Denk <wd@denx.de>
+    Acked-by: Wolfgang Denk <wd@denx.de>
+
+commit d47628a6ecf80cd4584a50b6c795b90c985a48e5
+Author: Alessandro Rubini <rubini-list@gnudd.com>
+Date:	Fri Aug 7 13:59:26 2009 +0200
+
+    arm nomadik: activate defrag choose 4k transfer block size
+
+    This chooses 4kB data size for both TFTP and NFS, as an example
+    about how to use support for IP fragments.
+
+    Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
+    Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit bd931ca61c84039241d438ade4a9755ae0e5372f
+Author: Alessandro Rubini <rubini-list@gnudd.com>
+Date:	Fri Aug 7 13:59:16 2009 +0200
+
+    nfs: accept CONFIG_NFS_READ_SIZE from config file
+
+    To take advantage of defragmented packets, the config file
+    can define CONFIG_NFS_READ_SIZE to override the 1kB default.
+    No support is there for an environment variable by now.
+
+    Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
+    Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 89ba81d1079a07b8430a98c1746c6d411312eb0d
+Author: Alessandro Rubini <rubini-list@gnudd.com>
+Date:	Fri Aug 7 13:59:06 2009 +0200
+
+    tftp: get the tftp block size from config file and from the environment
+
+    Increasing the block size is useful if CONFIG_IP_DEFRAG is
+    used. Howerver, the last fragments in a burst may overflow the
+    receiving ethernet, so the default is left at 1468, with thre new
+    CONFIG_TFTP_BLOCKSIZE for config files. Further, "tftpblocksize"
+    can be set in the environment.
+
+    Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
+    Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 5cfaa4e54d0eb8232fa1cf092d955fdaed5b673d
+Author: Alessandro Rubini <rubini-list@gnudd.com>
+Date:	Fri Aug 7 13:58:56 2009 +0200
+
+    net: defragment IP packets
+
+    The defragmenting code is enabled by CONFIG_IP_DEFRAG; the code is
+    useful for TFTP and NFS transfers.	The user can specify the maximum
+    defragmented payload as CONFIG_NET_MAXDEFRAG (default 16k).
+    Since NFS has a bigger per-packet overhead than TFTP, the static
+    reassembly buffer can hold CONFIG_NET_MAXDEFRAG + the NFS overhead.
+
+    The packet buffer is used as an array of "hole" structures, acting as
+    a double-linked list. Each new fragment can split a hole in two,
+    reduce a hole or fill a hole. No support is there for a fragment
+    overlapping two diffrent holes (i.e., thre new fragment is across an
+    already-received fragment).
+
+    Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
+    Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
 commit 68e74567cf317318df52dbcb2ac170ffc5e7758a
 Author: Feng Kan <fkan@amcc.com>
 Date:	Fri Aug 21 10:59:42 2009 -0700
@@ -89,6 +6164,93 @@ Date:	Fri Aug 21 10:59:42 2009 -0700
     Acked-by: Prodyut Hazarika <phazarika@amcc.com>
     Signed-off-by: Stefan Roese <sr@denx.de>
 
+commit 307ecb6db04eebdc06b8c87d48bf48d3cbd5e9d7
+Author: Eric Millbrandt <emillbrandt@coldhaus.com>
+Date:	Thu Aug 13 08:32:37 2009 -0500
+
+    Add support for USB on PSC3 for the mpc5200
+
+    Support USB on PSC3 on the mpc5200.  Before this patch, enabling USB support
+    would reconfigure PSC4 and PSC5 to USB.  The mpc5200 does not support USB
+    enabled on both the standard USB port and PSC3.  This patch masks the
+    appropriate bits when enabling USB.
+
+    Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
+    Acked-by: Grant Likely <grant.likely@secretlab.ca>
+    Acked-by: Remy Bohmer <linux@bohmer.net>
+
+commit 6b8548b0f7068379ad1efa4fa28725f361b2d3cd
+Author: Albin Tonnerre <albin.tonnerre@free-electrons.com>
+Date:	Thu Aug 13 19:12:44 2009 +0200
+
+    Add driver for the ST M41T94 SPI RTC
+
+    This RTC is used in some Calao boards. The driver code is taken from
+    the linux rtc-m41t94 driver
+
+    Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
+
+commit 885fc78c28fbe773bcb4edc9dd0fdac05ebb5b38
+Author: Albin Tonnerre <albin.tonnerre@free-electrons.com>
+Date:	Thu Aug 13 15:31:12 2009 +0200
+
+    Switch from per-driver to common definition of bin2bcd and bcd2bin
+
+    Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
+    Acked-by: Stefan Roese <sr@denx.de>
+
+commit e84aba135ed7145299304ef550e92f08b2c99d7a
+Author: Albin Tonnerre <albin.tonnerre@free-electrons.com>
+Date:	Thu Aug 13 15:31:11 2009 +0200
+
+    Replace BCD2BIN and BIN2BCD macros with inline functions
+
+    In the process, also remove backward-compatiblity macros BIN_TO_BCD and
+    BCD_TO_BIN and update the sole board using them to use the new bin2bcd
+    and bcd2bin instead
+
+    Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
+    Acked-by: Stefan Roese <sr@denx.de>
+    Acked-by: Detlev Zundel <dzu@denx.de>
+
+commit 5b53b29bc2e82b80b669f1d2402068c60d7fecd0
+Author: Eric Millbrandt <emillbrandt@coldhaus.com>
+Date:	Thu Aug 13 10:14:21 2009 -0500
+
+    Add support for the galaxy5200
+
+    Add support for the DEKA Research and Development galaxy5200 board
+
+    The galaxy5200 is an Freescale mpc5200 based embedded industrial
+    control board.
+
+    Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
+
+commit 0a9e4e772123fe3e2bb499d7d2160c4cfd8a3a8d
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Fri Jul 24 16:34:32 2009 -0400
+
+    unify {CONFIG_,}ENV_IS_EMBEDDED
+
+    Some boards have fallen out of sync by defining CONFIG_ENV_IS_EMBEDDED
+    manually.  While it is useful to have this available to the build system,
+    let's do it automatically rather than forcing people to opt into it.
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+    Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 02c9aa1d41f73fdcf8383a36cc0cbbfaf952855d
+Author: Robin Getz <rgetz@blackfin.uclinux.org>
+Date:	Mon Jul 27 00:07:59 2009 -0400
+
+    Add md5sum and sha1 commands...
+
+    Now that we have sha1 and md5 in lib_generic, allow people to use
+    them on the command line, for checking downloaded files.
+
+    Signed-off-by: Robin Getz <rgetz@analog.com>
+
 commit 30fc5cd3116cb112d0aab7e6d7c8eef1b67ed075
 Author: Wolfgang Denk <wd@denx.de>
 Date:	Tue Aug 25 12:22:38 2009 +0200
diff --git a/Makefile b/Makefile
index a69e6d5b60e..bcb3fe953a3 100644
--- a/Makefile
+++ b/Makefile
@@ -22,9 +22,9 @@
 #
 
 VERSION = 2009
-PATCHLEVEL = 08
+PATCHLEVEL = 11
 SUBLEVEL =
-EXTRAVERSION =
+EXTRAVERSION = -rc1
 ifneq "$(SUBLEVEL)" ""
 U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
 else
diff --git a/board/davinci/dm6467evm/dm6467evm.c b/board/davinci/dm6467evm/dm6467evm.c
index 960581824c3..ac3b2829933 100644
--- a/board/davinci/dm6467evm/dm6467evm.c
+++ b/board/davinci/dm6467evm/dm6467evm.c
@@ -28,4 +28,3 @@ int board_init(void)
 
 	return 0;
 }
-
diff --git a/board/ep8248/ep8248.c b/board/ep8248/ep8248.c
index 57d39aa7e55..590894371d1 100644
--- a/board/ep8248/ep8248.c
+++ b/board/ep8248/ep8248.c
@@ -268,4 +268,3 @@ void ft_board_setup(void *blob, bd_t *bd)
 	ft_cpu_setup( blob, bd);
 }
 #endif /* defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) */
-
diff --git a/board/logicpd/imx27lite/Makefile b/board/logicpd/imx27lite/Makefile
index c404cef58df..04dc8ae1fd9 100644
--- a/board/logicpd/imx27lite/Makefile
+++ b/board/logicpd/imx27lite/Makefile
@@ -48,4 +48,3 @@ include $(SRCTREE)/rules.mk
 sinclude $(obj).depend
 
 #########################################################################
-
diff --git a/cpu/arm926ejs/mx27/generic.c b/cpu/arm926ejs/mx27/generic.c
index 808371fb15d..da05c55fb53 100644
--- a/cpu/arm926ejs/mx27/generic.c
+++ b/cpu/arm926ejs/mx27/generic.c
@@ -328,4 +328,3 @@ void mx27_sd2_init_pins(void)
 
 }
 #endif /* CONFIG_MXC_MMC */
-
diff --git a/cpu/arm_cortexa8/start.S b/cpu/arm_cortexa8/start.S
index 14a9bd3b039..29dae2f2823 100644
--- a/cpu/arm_cortexa8/start.S
+++ b/cpu/arm_cortexa8/start.S
@@ -414,4 +414,3 @@ fiq:
 	bl	do_fiq
 
 #endif
-
diff --git a/cpu/mpc85xx/fixed_ivor.S b/cpu/mpc85xx/fixed_ivor.S
index dc725c94813..320cae32962 100644
--- a/cpu/mpc85xx/fixed_ivor.S
+++ b/cpu/mpc85xx/fixed_ivor.S
@@ -35,22 +35,22 @@
 	li	r3,vector_offset@l; 		\
 	mtspr	SPRN_GIVOR##vector_number,r3;
 
-        SET_IVOR(0, 0x020) /* Critical Input */
-        SET_IVOR(1, 0x000) /* Machine Check */
-        SET_IVOR(2, 0x060) /* Data Storage */
-        SET_IVOR(3, 0x080) /* Instruction Storage */
-        SET_IVOR(4, 0x0a0) /* External Input */
-        SET_IVOR(5, 0x0c0) /* Alignment */
-        SET_IVOR(6, 0x0e0) /* Program */
-        SET_IVOR(7, 0x100) /* FP Unavailable */
-        SET_IVOR(8, 0x120) /* System Call */
-        SET_IVOR(9, 0x140) /* Auxiliary Processor Unavailable */
-        SET_IVOR(10, 0x160) /* Decrementer */
-        SET_IVOR(11, 0x180) /* Fixed Interval Timer */
-        SET_IVOR(12, 0x1a0) /* Watchdog Timer */
-        SET_IVOR(13, 0x1c0) /* Data TLB Error */
-        SET_IVOR(14, 0x1e0) /* Instruction TLB Error */
-        SET_IVOR(15, 0x040) /* Debug */
+	SET_IVOR(0, 0x020) /* Critical Input */
+	SET_IVOR(1, 0x000) /* Machine Check */
+	SET_IVOR(2, 0x060) /* Data Storage */
+	SET_IVOR(3, 0x080) /* Instruction Storage */
+	SET_IVOR(4, 0x0a0) /* External Input */
+	SET_IVOR(5, 0x0c0) /* Alignment */
+	SET_IVOR(6, 0x0e0) /* Program */
+	SET_IVOR(7, 0x100) /* FP Unavailable */
+	SET_IVOR(8, 0x120) /* System Call */
+	SET_IVOR(9, 0x140) /* Auxiliary Processor Unavailable */
+	SET_IVOR(10, 0x160) /* Decrementer */
+	SET_IVOR(11, 0x180) /* Fixed Interval Timer */
+	SET_IVOR(12, 0x1a0) /* Watchdog Timer */
+	SET_IVOR(13, 0x1c0) /* Data TLB Error */
+	SET_IVOR(14, 0x1e0) /* Instruction TLB Error */
+	SET_IVOR(15, 0x040) /* Debug */
 
 /* e500v1 & e500v2 only */
 #ifndef CONFIG_E500MC
@@ -59,21 +59,21 @@
 	SET_IVOR(34, 0x240) /* Embedded FP Round */
 #endif
 
-        SET_IVOR(35, 0x260) /* Performance monitor */
+	SET_IVOR(35, 0x260) /* Performance monitor */
 
 /* e500mc only */
 #ifdef CONFIG_E500MC
-        SET_IVOR(36, 0x280) /* Processor doorbell */
-        SET_IVOR(37, 0x2a0) /* Processor doorbell critical */
-        SET_IVOR(38, 0x2c0) /* Guest Processor doorbell */
-        SET_IVOR(39, 0x2e0) /* Guest Processor critical & machine check */
-        SET_IVOR(40, 0x300) /* Hypervisor system call */
-        SET_IVOR(41, 0x320) /* Hypervisor Priviledge */
+	SET_IVOR(36, 0x280) /* Processor doorbell */
+	SET_IVOR(37, 0x2a0) /* Processor doorbell critical */
+	SET_IVOR(38, 0x2c0) /* Guest Processor doorbell */
+	SET_IVOR(39, 0x2e0) /* Guest Processor critical & machine check */
+	SET_IVOR(40, 0x300) /* Hypervisor system call */
+	SET_IVOR(41, 0x320) /* Hypervisor Priviledge */
 
-        SET_GIVOR(2, 0x060) /* Guest Data Storage */
-        SET_GIVOR(3, 0x080) /* Guest Instruction Storage */
-        SET_GIVOR(4, 0x0a0) /* Guest External Input */
-        SET_GIVOR(8, 0x120) /* Guest System Call */
-        SET_GIVOR(13, 0x1c0) /* Guest Data TLB Error */
-        SET_GIVOR(14, 0x1e0) /* Guest Instruction TLB Error */
+	SET_GIVOR(2, 0x060) /* Guest Data Storage */
+	SET_GIVOR(3, 0x080) /* Guest Instruction Storage */
+	SET_GIVOR(4, 0x0a0) /* Guest External Input */
+	SET_GIVOR(8, 0x120) /* Guest System Call */
+	SET_GIVOR(13, 0x1c0) /* Guest Data TLB Error */
+	SET_GIVOR(14, 0x1e0) /* Guest Instruction TLB Error */
 #endif
diff --git a/doc/README.bitbangMII b/doc/README.bitbangMII
index edd085630f1..0a2fa48a56f 100644
--- a/doc/README.bitbangMII
+++ b/doc/README.bitbangMII
@@ -6,7 +6,7 @@ buses are implemented via bit-banging mode.
 The driver requires that the following macros should be defined into the board
 configuration file:
 
-CONFIG_BITBANGMII       - Enable the miiphybb driver
+CONFIG_BITBANGMII	- Enable the miiphybb driver
 CONFIG_BITBANGMII_MULTI - Enable the multi bus support
 
 If the CONFIG_BITBANGMII_MULTI is not defined, the board's config file needs
@@ -19,7 +19,7 @@ MDIO_TRISTATE - Activate the MDIO pin as input/tristate pin
 MDIO_READ     - Read the MDIO pin
 MDIO(v)       - Write v on the MDIO pin
 MDC_DECLARE   - Declaration needed to access to the MDC pin (optional)
-MDC(v)        - Write v on the MDC pin
+MDC(v)	      - Write v on the MDC pin
 
 The previous macros make the driver compatible with the previous version
 (that didn't support the multi-bus).
@@ -30,17 +30,17 @@ the bb_miiphy_buses_num variable with the number of mii buses.
 The record (struct bb_miiphy_bus) has the following fields/callbacks (see
 miiphy.h for details):
 
-char name[]            - The symbolic name that must be equal to the MII bus
-                         registered name
-int (*init)()          - Initialization function called at startup time (just
-                         before the Ethernet initialization)
+char name[]	       - The symbolic name that must be equal to the MII bus
+			 registered name
+int (*init)()	       - Initialization function called at startup time (just
+			 before the Ethernet initialization)
 int (*mdio_active)()   - Activate the MDIO pin as output
 int (*mdio_tristate)() - Activate the MDIO pin as input/tristate pin
 int (*set_mdio)()      - Write the MDIO pin
 int (*get_mdio)()      - Read the MDIO pin
 int (*set_mdc)()       - Write the MDC pin
-int (*delay)()         - Delay function
-void *priv             - Private data used by board specific code
+int (*delay)()	       - Delay function
+void *priv	       - Private data used by board specific code
 
 The board code will look like:
 
@@ -50,7 +50,7 @@ struct bb_miiphy_bus bb_miiphy_buses[] = {
  ...
 };
 int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) /
-                          sizeof(bb_miiphy_buses[0]);
+			  sizeof(bb_miiphy_buses[0]);
 
 2009 Industrie Dial Face S.p.A.
      Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
diff --git a/doc/README.drivers.eth b/doc/README.drivers.eth
index e06d3ad44ba..e73e462c8c2 100644
--- a/doc/README.drivers.eth
+++ b/doc/README.drivers.eth
@@ -88,7 +88,7 @@ The return value for this function should be as follows:
 < 0 - failure (hardware failure, not probe failure)
 >=0 - number of interfaces detected
 
-You might notice that many drivers seem to use xxx_initialize() rather than 
+You might notice that many drivers seem to use xxx_initialize() rather than
 xxx_register().  This is the old naming convention and should be avoided as it
 causes confusion with the driver-specific init function.
 
diff --git a/doc/README.kwbimage b/doc/README.kwbimage
index 2a5b3b3be5d..6dd942f1097 100644
--- a/doc/README.kwbimage
+++ b/doc/README.kwbimage
@@ -17,12 +17,12 @@ Command syntax:
 		to list the kwb image file details
 
 ./tools/mkimage -n <board specific configuration file> \
-                -T kwbimage -a <start address> -e <execution address> \
+		-T kwbimage -a <start address> -e <execution address> \
 		-d <input_raw_binary> <output_kwboot_file>
 
 for ex.
 ./tools/mkimage -n ./board/Marvell/openrd_base/kwbimage.cfg \
-                -T kwbimage -a 0x00600000 -e 0x00600000 \
+		-T kwbimage -a 0x00600000 -e 0x00600000 \
 		-d u-boot.bin u-boot.kwb
 
 kwimage support available with mkimage utility will generate kirkwood boot
diff --git a/drivers/net/phy/miiphybb.c b/drivers/net/phy/miiphybb.c
index 4a7ce5b0454..2768c7584e2 100644
--- a/drivers/net/phy/miiphybb.c
+++ b/drivers/net/phy/miiphybb.c
@@ -119,7 +119,7 @@ struct bb_miiphy_bus bb_miiphy_buses[] = {
 };
 
 int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) /
-                          sizeof(bb_miiphy_buses[0]);
+			  sizeof(bb_miiphy_buses[0]);
 #endif
 
 void bb_miiphy_init(void)
@@ -167,7 +167,7 @@ static inline struct bb_miiphy_bus *bb_miiphy_getbus(char *devname)
  * and write).
  */
 static void miiphy_pre(struct bb_miiphy_bus *bus, char read,
-                       unsigned char addr, unsigned char reg)
+		       unsigned char addr, unsigned char reg)
 {
 	int j;
 
@@ -247,7 +247,7 @@ static void miiphy_pre(struct bb_miiphy_bus *bus, char read,
  *   0 on success
  */
 int bb_miiphy_read(char *devname, unsigned char addr,
-                   unsigned char reg, unsigned short *value)
+		   unsigned char reg, unsigned short *value)
 {
 	short rdreg; /* register working value */
 	int v;
@@ -328,7 +328,7 @@ int bb_miiphy_read(char *devname, unsigned char addr,
  *   0 on success
  */
 int bb_miiphy_write (char *devname, unsigned char addr,
-                     unsigned char reg, unsigned short value)
+		     unsigned char reg, unsigned short value)
 {
 	struct bb_miiphy_bus *bus;
 	int j;			/* counter */
diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c
index df7347897b1..c50758e5320 100644
--- a/drivers/net/smc911x.c
+++ b/drivers/net/smc911x.c
@@ -148,7 +148,7 @@ static int smc911x_init(struct eth_device *dev, bd_t * bd)
 {
 	struct chip_id *id = dev->priv;
 
-        printf(DRIVERNAME ": detected %s controller\n", id->name);
+	printf(DRIVERNAME ": detected %s controller\n", id->name);
 
 	smc911x_reset(dev);
 
diff --git a/include/asm-arm/arch-davinci/gpio_defs.h b/include/asm-arm/arch-davinci/gpio_defs.h
index ec43969f5fa..ff629761b58 100644
--- a/include/asm-arm/arch-davinci/gpio_defs.h
+++ b/include/asm-arm/arch-davinci/gpio_defs.h
@@ -50,4 +50,3 @@ struct davinci_gpio_bank {
 };
 
 #endif
-
diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h
index 310242e0bd6..e2930c19b30 100644
--- a/include/configs/P1_P2_RDB.h
+++ b/include/configs/P1_P2_RDB.h
@@ -282,7 +282,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
  * shorted - index 1
  */
 #define CONFIG_CONS_INDEX	1
-//#define CONFIG_CONS_INDEX	2
 #undef	CONFIG_SERIAL_SOFTWARE_FIFO
 #define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_SERIAL
diff --git a/include/configs/davinci_dm6467evm.h b/include/configs/davinci_dm6467evm.h
index 2a4cb79f88f..6617941d8ce 100644
--- a/include/configs/davinci_dm6467evm.h
+++ b/include/configs/davinci_dm6467evm.h
@@ -129,4 +129,3 @@
 #endif
 
 #endif /* __CONFIG_H */
-