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authorDipen Dudhat <dipen.dudhat@freescale.com>2010-03-18 17:33:22 +0530
committerScott Sweeny <scott.sweeny@timesys.com>2010-11-10 14:52:25 -0500
commit86393b1b88199d55eb1ab739d05ab744750cdb67 (patch)
treedba133b182e14e0a77d262c63bed9447711022cf
parente73578b0b86f54c6c30a656776a1613faa368a16 (diff)
fix the voltage validation process in eSDHC Driver
The current code use all the voltage range support by the host controller to do the validation. This will cause problem when the host supports Low Voltage Range. Change the validation voltage to be based on board setup. This patch is derived from P2020DS BSP Release. Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com>
-rw-r--r--drivers/mmc/fsl_esdhc.c18
1 files changed, 14 insertions, 4 deletions
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 13696bab0b..d3ffb2fef7 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -395,7 +395,7 @@ static int esdhc_initialize(bd_t *bis)
{
struct fsl_esdhc *regs = (struct fsl_esdhc *)CONFIG_SYS_FSL_ESDHC_ADDR;
struct mmc *mmc;
- u32 caps;
+ u32 caps, voltage_caps;
mmc = malloc(sizeof(struct mmc));
@@ -409,11 +409,21 @@ static int esdhc_initialize(bd_t *bis)
/* 1.8V incorrectly set in hardware on P1020 & P1022 eSDHC */
if (caps & ESDHC_HOSTCAPBLT_VS18)
- mmc->voltages |= MMC_VDD_165_195;
+ voltage_caps |= MMC_VDD_165_195;
if (caps & ESDHC_HOSTCAPBLT_VS30)
- mmc->voltages |= MMC_VDD_29_30 | MMC_VDD_30_31;
+ voltage_caps |= MMC_VDD_29_30 | MMC_VDD_30_31;
if (caps & ESDHC_HOSTCAPBLT_VS33)
- mmc->voltages |= MMC_VDD_32_33 | MMC_VDD_33_34;
+ voltage_caps |= MMC_VDD_32_33 | MMC_VDD_33_34;
+
+#ifdef CONFIG_SYS_SD_VOLTAGE
+ mmc->voltages = CONFIG_SYS_SD_VOLTAGE;
+#else
+ mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
+#endif
+ if ((mmc->voltages & voltage_caps) == 0) {
+ printf("voltage not supported by controller\n");
+ return -1;
+ }
mmc->host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT;