diff options
author | Fabio Estevam <fabio.estevam@freescale.com> | 2013-07-26 13:54:27 -0300 |
---|---|---|
committer | Marek Vasut <marex@denx.de> | 2013-08-26 21:56:34 +0200 |
commit | c3904128ad8c85b91bf1df2ed4b38fa8a17f32a6 (patch) | |
tree | 84589dce01748e12112931bcdef75484e10a0cb7 | |
parent | c4219a82cdf1e5f6009e2318b7cc008a93998574 (diff) |
usb: ehci-mx5: Remove unneeded write to cscmr1 register
Currently we have the following behavior in ehci_hcd_init()
- Read csmr1 register, clear bit 26 and then set bit 26.
However a little bit later we call set_usb_phy_clk() which clears bit 26, so
let's get rid of the unnecessary code.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
-rw-r--r-- | drivers/usb/host/ehci-mx5.c | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/drivers/usb/host/ehci-mx5.c b/drivers/usb/host/ehci-mx5.c index 3548620ecaf..a397d2409fd 100644 --- a/drivers/usb/host/ehci-mx5.c +++ b/drivers/usb/host/ehci-mx5.c @@ -221,15 +221,6 @@ void __weak board_ehci_hcd_postinit(struct usb_ehci *ehci, int port) int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor) { struct usb_ehci *ehci; -#ifdef CONFIG_MX53 - struct clkctl *sc_regs = (struct clkctl *)CCM_BASE_ADDR; - u32 reg; - - reg = __raw_readl(&sc_regs->cscmr1) & ~(1 << 26); - /* derive USB PHY clock multiplexer from PLL3 */ - reg |= 1 << 26; - __raw_writel(reg, &sc_regs->cscmr1); -#endif set_usboh3_clk(); enable_usboh3_clk(1); |