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authorBai Ping <ping.bai@nxp.com>2016-08-30 15:54:26 +0800
committerStefan Agner <stefan.agner@toradex.com>2017-08-31 19:57:39 -0700
commit84fe4a715da4f42ac4399d7332dc298cea37ddde (patch)
treee4bc536e6bea2826e75633f2a0b4fe27b63a17da
parent1d86d8504d8c61e9cbdf7f19ae353f526cf06be6 (diff)
MLK-13140 ARM: imx: update REFTOP_VBGADJ according to fuse setting
On i.MX6ULL, according to the latest REFTOP_TRIM fuse define, we need to set the REFTOP_VBGADJ bits in PMU_MISC0 register as below table: '000" - set REFTOP_VBGADJ[2:0] to 3'b000 '001" - set REFTOP_VBGADJ[2:0] to 3'b001 '010" - set REFTOP_VBGADJ[2:0] to 3'b010 '011" - set REFTOP_VBGADJ[2:0] to 3'b011 '100" - set REFTOP_VBGADJ[2:0] to 3'b100 '101" - set REFTOP_VBGADJ[2:0] to 3'b101 '110" - set REFTOP_VBGADJ[2:0] to 3'b110 '111" - set REFTOP_VBGADJ[2:0] to 3'b111 Signed-off-by: Bai Ping <ping.bai@nxp.com> (cherry picked from commit b2690f5cf54390999acb2f1f7b788bfd18fa11be) (cherry picked from commit 30ce7adebd443ef777e820c4a891cbb3b28ac671)
-rw-r--r--arch/arm/cpu/armv7/mx6/soc.c5
1 files changed, 0 insertions, 5 deletions
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 71c2ab9bd76..9b89c87e047 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -339,11 +339,6 @@ static void init_bandgap(void)
val >>= OCOTP_MEM0_REFTOP_TRIM_SHIFT;
val &= 0x7;
- if (val == 0) {
- val = 6;
- } else if (val == 6) {
- val = 0;
- }
writel(val << BM_ANADIG_ANA_MISC0_REFTOP_VBGADJ_SHIFT,
&anatop->ana_misc0_set);
}