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authorVishnu Suresh <Vishnu@freescale.com>2009-06-05 17:04:36 +0530
committerJustin Waters <justin.waters@timesys.com>2009-10-07 15:47:50 -0400
commit4644d31777f2f537e192a436d02d08fdfe210bcc (patch)
tree22868456cc63b0dd3e65216c15b4070b2a0e9252
parentb2b3a892a3d16019ac675fea40d875ba6da7878c (diff)
Retain ESDHC SCR settings
This patch retains the AHB2MAG IRQ_BYPASS set upon esdhc_initialize. Signed-off-by: Vishnu Suresh <Vishnu@freescale.com>
-rw-r--r--drivers/mmc/fsl_esdhc.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index f93e5fcf3fa..085dba825ec 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -402,7 +402,7 @@ static int esdhc_init(struct mmc *mmc)
int timeout = 1000;
/* Enable cache snooping */
- out_be32(&regs->scr, 0x00000040);
+ out_be32(&regs->scr, 0x00000040 | in_be32(&regs->scr));
out_be32(&regs->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN);
/* Set the initial clock speed */