diff options
author | Wolfgang Denk <wd@denx.de> | 2009-06-14 20:58:45 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2009-07-14 00:01:32 +0200 |
commit | a9905db5d29a56aedd7db5bcb56b0385873aa6a3 (patch) | |
tree | b3d13da7a7bab52c7906c2badacc940f1334d87d | |
parent | f5489c4200b37c9a1d6dbde116f5adc0539610de (diff) |
MPC512x: Add MSCAN1...4 Clock Control Registers
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
-rw-r--r-- | include/asm-ppc/immap_512x.h | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/include/asm-ppc/immap_512x.h b/include/asm-ppc/immap_512x.h index 3648a05f8cb..24e6c6934ee 100644 --- a/include/asm-ppc/immap_512x.h +++ b/include/asm-ppc/immap_512x.h @@ -185,10 +185,11 @@ typedef struct clk512x { u8 res0[4]; u32 bcr; /* Bread Crumb Register */ u32 pscccr[12]; /* PSC0-11 Clock Control Registers */ - u32 spccr; /* SPDIF Clock Control Registers */ - u32 cccr; /* CFM Clock Control Registers */ - u32 dccr; /* DIU Clock Control Registers */ - u8 res1[0xa8]; + u32 spccr; /* SPDIF Clock Control Register */ + u32 cccr; /* CFM Clock Control Register */ + u32 dccr; /* DIU Clock Control Register */ + u32 msccr[4]; /* MSCAN1-4 Clock Control Registers */ + u8 res1[0x98]; } clk512x_t; /* SPMR - System PLL Mode Register */ |