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authorSimon Glass <sjg@chromium.org>2019-04-25 21:59:03 -0600
committerBin Meng <bmeng.cn@gmail.com>2019-05-08 13:02:15 +0800
commit2b36eabd8aec5107f4753715c2fb4e30cb0d6136 (patch)
tree3d3dbb4fe03a4e91c45f53d6b75f338822c9875d
parent9ffe7cd5c421e21317d56c80c1390aba636b3ffb (diff)
x86: broadwell: Implement PCH_REQ_PMBASE_INFO
Implement this ioctl() to support power off. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
-rw-r--r--arch/x86/cpu/broadwell/pch.c25
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/x86/cpu/broadwell/pch.c b/arch/x86/cpu/broadwell/pch.c
index 73d3d3b515..e61efa7b16 100644
--- a/arch/x86/cpu/broadwell/pch.c
+++ b/arch/x86/cpu/broadwell/pch.c
@@ -630,10 +630,35 @@ static int broadwell_get_gpio_base(struct udevice *dev, u32 *gbasep)
return 0;
}
+static int broadwell_ioctl(struct udevice *dev, enum pch_req_t req, void *data,
+ int size)
+{
+ switch (req) {
+ case PCH_REQ_PMBASE_INFO: {
+ struct pch_pmbase_info *pm = data;
+ int ret;
+
+ /* Find the base address of the powermanagement registers */
+ ret = dm_pci_read_config16(dev, 0x40, &pm->base);
+ if (ret)
+ return ret;
+ pm->base &= 0xfffe;
+ pm->gpio0_en_ofs = GPE0_EN(0);
+ pm->pm1_sts_ofs = PM1_STS;
+ pm->pm1_cnt_ofs = PM1_CNT;
+
+ return 0;
+ }
+ default:
+ return -ENOSYS;
+ }
+}
+
static const struct pch_ops broadwell_pch_ops = {
.get_spi_base = broadwell_pch_get_spi_base,
.set_spi_protect = broadwell_set_spi_protect,
.get_gpio_base = broadwell_get_gpio_base,
+ .ioctl = broadwell_ioctl,
};
static const struct udevice_id broadwell_pch_ids[] = {