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authorMichal Simek <michal.simek@xilinx.com>2015-11-30 16:13:03 +0100
committerMichal Simek <michal.simek@xilinx.com>2015-12-07 10:14:29 +0100
commitd9ae52c8f081e30cfceafc0ddb7f29d4ecd36d00 (patch)
treeeeab09faa3c621fb84d59d392774bffe5440daa3
parent400434537b6c79116dde82899037ae532e81482d (diff)
zynq: sdhci: Move driver to DM
Move driver to DM Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/dts/zynq-zc702.dts3
-rw-r--r--arch/arm/include/asm/arch-zynqmp/hardware.h3
-rw-r--r--arch/arm/include/asm/arch-zynqmp/sys_proto.h1
-rw-r--r--arch/arm/mach-zynq/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-zynq/include/mach/sys_proto.h2
-rw-r--r--board/xilinx/zynq/board.c17
-rw-r--r--board/xilinx/zynqmp/zynqmp.c22
-rw-r--r--drivers/mmc/zynq_sdhci.c44
9 files changed, 37 insertions, 59 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 67d4fd59ac4..fb9176b8a9c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -553,6 +553,7 @@ config ARCH_ZYNQ
select DM
select DM_ETH
select SPL_DM
+ select DM_MMC
select DM_SPI
select DM_SERIAL
select DM_SPI_FLASH
@@ -564,6 +565,7 @@ config ARCH_ZYNQMP
select DM
select OF_CONTROL
select DM_ETH
+ select DM_MMC
select DM_SERIAL
config TEGRA
diff --git a/arch/arm/dts/zynq-zc702.dts b/arch/arm/dts/zynq-zc702.dts
index c41723641ee..528cd27796c 100644
--- a/arch/arm/dts/zynq-zc702.dts
+++ b/arch/arm/dts/zynq-zc702.dts
@@ -18,6 +18,7 @@
i2c0 = &i2c0;
serial0 = &uart1;
spi0 = &qspi;
+ mmc0 = &sdhci0;
};
memory {
@@ -370,6 +371,7 @@
};
&sdhci0 {
+ u-boot,dm-pre-reloc;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdhci0_default>;
@@ -383,6 +385,7 @@
};
&qspi {
+ u-boot,dm-pre-reloc;
status = "okay";
};
diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h
index 96d25ee8dae..bbf89d9dd74 100644
--- a/arch/arm/include/asm/arch-zynqmp/hardware.h
+++ b/arch/arm/include/asm/arch-zynqmp/hardware.h
@@ -19,9 +19,6 @@
#define ZYNQ_I2C_BASEADDR0 0xFF020000
#define ZYNQ_I2C_BASEADDR1 0xFF030000
-#define ZYNQ_SDHCI_BASEADDR0 0xFF160000
-#define ZYNQ_SDHCI_BASEADDR1 0xFF170000
-
#define ZYNQMP_SATA_BASEADDR 0xFD0C0000
#define ZYNQMP_USB0_XHCI_BASEADDR 0xFE200000
diff --git a/arch/arm/include/asm/arch-zynqmp/sys_proto.h b/arch/arm/include/asm/arch-zynqmp/sys_proto.h
index f1e95a2a28e..021626dc140 100644
--- a/arch/arm/include/asm/arch-zynqmp/sys_proto.h
+++ b/arch/arm/include/asm/arch-zynqmp/sys_proto.h
@@ -13,7 +13,6 @@ static inline void zynq_slcr_gem_clk_setup(u32 gem_id, unsigned long clk_rate)
{
}
-int zynq_sdhci_init(phys_addr_t regbase);
int zynq_slcr_get_mio_pin_status(const char *periph);
unsigned int zynqmp_get_silicon_version(void);
diff --git a/arch/arm/mach-zynq/include/mach/hardware.h b/arch/arm/mach-zynq/include/mach/hardware.h
index 513b1117b9d..830e1fea180 100644
--- a/arch/arm/mach-zynq/include/mach/hardware.h
+++ b/arch/arm/mach-zynq/include/mach/hardware.h
@@ -12,8 +12,6 @@
#define ZYNQ_SCU_BASEADDR 0xF8F00000
#define ZYNQ_GEM_BASEADDR0 0xE000B000
#define ZYNQ_GEM_BASEADDR1 0xE000C000
-#define ZYNQ_SDHCI_BASEADDR0 0xE0100000
-#define ZYNQ_SDHCI_BASEADDR1 0xE0101000
#define ZYNQ_I2C_BASEADDR0 0xE0004000
#define ZYNQ_I2C_BASEADDR1 0xE0005000
#define ZYNQ_SPI_BASEADDR0 0xE0006000
diff --git a/arch/arm/mach-zynq/include/mach/sys_proto.h b/arch/arm/mach-zynq/include/mach/sys_proto.h
index 151b903aa18..882beabe132 100644
--- a/arch/arm/mach-zynq/include/mach/sys_proto.h
+++ b/arch/arm/mach-zynq/include/mach/sys_proto.h
@@ -20,8 +20,6 @@ extern void zynq_ddrc_init(void);
extern unsigned int zynq_get_silicon_version(void);
/* Driver extern functions */
-extern int zynq_sdhci_init(phys_addr_t regbase);
-
extern void ps7_init(void);
#endif /* _SYS_PROTO_H_ */
diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index 572b1468bf5..414f5302a06 100644
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -122,23 +122,6 @@ int board_eth_init(bd_t *bis)
return ret;
}
-#ifdef CONFIG_CMD_MMC
-int board_mmc_init(bd_t *bd)
-{
- int ret = 0;
-
-#if defined(CONFIG_ZYNQ_SDHCI)
-# if defined(CONFIG_ZYNQ_SDHCI0)
- ret = zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR0);
-# endif
-# if defined(CONFIG_ZYNQ_SDHCI1)
- ret |= zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR1);
-# endif
-#endif
- return ret;
-}
-#endif
-
int dram_init(void)
{
#if CONFIG_IS_ENABLED(OF_CONTROL)
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index 51dc30f90d7..2cf47125d43 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -65,28 +65,6 @@ void scsi_init(void)
}
#endif
-#ifdef CONFIG_CMD_MMC
-int board_mmc_init(bd_t *bd)
-{
- int ret = 0;
-
- u32 ver = zynqmp_get_silicon_version();
-
- if (ver != ZYNQMP_CSU_VERSION_VELOCE) {
-#if defined(CONFIG_ZYNQ_SDHCI)
-# if defined(CONFIG_ZYNQ_SDHCI0)
- ret = zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR0);
-# endif
-# if defined(CONFIG_ZYNQ_SDHCI1)
- ret |= zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR1);
-# endif
-#endif
- }
-
- return ret;
-}
-#endif
-
int board_late_init(void)
{
u32 reg = 0;
diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
index 87a1f4086fc..4fe3da93b20 100644
--- a/drivers/mmc/zynq_sdhci.c
+++ b/drivers/mmc/zynq_sdhci.c
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2013 Inc.
+ * (C) Copyright 2013 - 2015 Xilinx, Inc.
*
* Xilinx Zynq SD Host Controller Interface
*
@@ -7,28 +7,48 @@
*/
#include <common.h>
+#include <dm.h>
#include <fdtdec.h>
#include <libfdt.h>
#include <malloc.h>
#include <sdhci.h>
-#include <asm/arch/sys_proto.h>
-int zynq_sdhci_init(phys_addr_t regbase)
+static int arasan_sdhci_probe(struct udevice *dev)
{
- struct sdhci_host *host = NULL;
+ struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
+ struct sdhci_host *host = dev_get_priv(dev);
- host = (struct sdhci_host *)malloc(sizeof(struct sdhci_host));
- if (!host) {
- printf("zynq_sdhci_init: sdhci_host malloc fail\n");
- return 1;
- }
-
- host->name = "zynq_sdhci";
- host->ioaddr = (void *)regbase;
host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD |
SDHCI_QUIRK_BROKEN_R1B;
host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
add_sdhci(host, CONFIG_ZYNQ_SDHCI_MAX_FREQ, 0);
+
+ upriv->mmc = host->mmc;
+
return 0;
}
+
+static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev)
+{
+ struct sdhci_host *host = dev_get_priv(dev);
+
+ host->name = (char *)dev->name;
+ host->ioaddr = (void *)dev_get_addr(dev);
+
+ return 0;
+}
+
+static const struct udevice_id arasan_sdhci_ids[] = {
+ { .compatible = "arasan,sdhci-8.9a" },
+ { }
+};
+
+U_BOOT_DRIVER(arasan_sdhci_drv) = {
+ .name = "arasan_sdhci",
+ .id = UCLASS_MMC,
+ .of_match = arasan_sdhci_ids,
+ .ofdata_to_platdata = arasan_sdhci_ofdata_to_platdata,
+ .probe = arasan_sdhci_probe,
+ .priv_auto_alloc_size = sizeof(struct sdhci_host),
+};