Code cleanup

9 files changed, 50 insertions, 48 deletions

diff --git a/CHANGELOG b/CHANGELOG
index af180eed169..e326782373e 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,8 @@
 Changes since U-Boot 1.1.4:
 ======================================================================
 
+* Code cleanup
+
 * Update for MCC200 / PRS200 boards:
   - auto-adjust console device for Linux.
   - fix typos.
diff --git a/board/amcc/common/flash.c b/board/amcc/common/flash.c
index a0acbba70c3..e6429ecd136 100644
--- a/board/amcc/common/flash.c
+++ b/board/amcc/common/flash.c
@@ -35,7 +35,7 @@
 #include <ppc4xx.h>
 #include <asm/processor.h>
 
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];	/* info for FLASH chips        */
+flash_info_t flash_info[CFG_MAX_FLASH_BANKS];	/* info for FLASH chips */
 
 /*-----------------------------------------------------------------------
  * Functions
@@ -76,7 +76,7 @@ void flash_print_info(flash_info_t * info)
 	case FLASH_MAN_SST:
 		printf("SST ");
 		break;
-        case FLASH_MAN_MX:
+	case FLASH_MAN_MX:
 		printf ("MACRONIX ");
 		break;
 	default:
@@ -223,75 +223,75 @@ static ulong flash_get_size(vu_long * addr, flash_info_t * info)
 		return (0);	/* no or unknown flash  */
 	}
 
-	value = addr2[1];	/* device ID            */
+	value = addr2[1];	/* device ID */
 	DEBUGF("\nFLASH DEVICEID: %x\n", value);
 
 	switch (value) {
 	case (CFG_FLASH_WORD_SIZE) AMD_ID_LV040B:
 		info->flash_id += FLASH_AM040;
 		info->sector_count = 8;
-		info->size = 0x0080000;	/* => 512 ko */
+		info->size = 0x0080000;		/* => 512 KiB */
 		break;
 
 	case (CFG_FLASH_WORD_SIZE) AMD_ID_F040B:
 		info->flash_id += FLASH_AM040;
 		info->sector_count = 8;
-		info->size = 0x0080000;	/* => 512 ko */
+		info->size = 0x0080000;		/* => 512 KiB */
 		break;
 
 	case (CFG_FLASH_WORD_SIZE) STM_ID_M29W040B:
 		info->flash_id += FLASH_AM040;
 		info->sector_count = 8;
-		info->size = 0x0080000;	/* => 512 ko */
+		info->size = 0x0080000;		/* => 512 KiB */
 		break;
 
 	case (CFG_FLASH_WORD_SIZE) AMD_ID_F016D:
 		info->flash_id += FLASH_AMD016;
 		info->sector_count = 32;
-		info->size = 0x00200000;
-		break;		/* => 2 MB              */
+		info->size = 0x00200000;	/* => 2 MiB */
+		break;
 
 	case (CFG_FLASH_WORD_SIZE) AMD_ID_LV033C:
 		info->flash_id += FLASH_AMDLV033C;
 		info->sector_count = 64;
-		info->size = 0x00400000;
-		break;		/* => 4 MB              */
+		info->size = 0x00400000;	/* => 4 MiB */
+		break;
 
 	case (CFG_FLASH_WORD_SIZE) AMD_ID_LV400T:
 		info->flash_id += FLASH_AM400T;
 		info->sector_count = 11;
-		info->size = 0x00080000;
-		break;		/* => 0.5 MB            */
+		info->size = 0x00080000;	/* => 512 KiB */
+		break;
 
 	case (CFG_FLASH_WORD_SIZE) AMD_ID_LV400B:
 		info->flash_id += FLASH_AM400B;
 		info->sector_count = 11;
-		info->size = 0x00080000;
-		break;		/* => 0.5 MB            */
+		info->size = 0x00080000;	/* => 512 KiB */
+		break;
 
 	case (CFG_FLASH_WORD_SIZE) AMD_ID_LV800T:
 		info->flash_id += FLASH_AM800T;
 		info->sector_count = 19;
-		info->size = 0x00100000;
-		break;		/* => 1 MB              */
+		info->size = 0x00100000;	/* => 1 MiB */
+		break;
 
 	case (CFG_FLASH_WORD_SIZE) AMD_ID_LV800B:
 		info->flash_id += FLASH_AM800B;
 		info->sector_count = 19;
-		info->size = 0x00100000;
-		break;		/* => 1 MB              */
+		info->size = 0x00100000;	/* => 1 MiB */
+		break;
 
 	case (CFG_FLASH_WORD_SIZE) AMD_ID_LV160T:
 		info->flash_id += FLASH_AM160T;
 		info->sector_count = 35;
-		info->size = 0x00200000;
-		break;		/* => 2 MB              */
+		info->size = 0x00200000;	/* => 2 MiB */
+		break;
 
 	case (CFG_FLASH_WORD_SIZE) AMD_ID_LV160B:
 		info->flash_id += FLASH_AM160B;
 		info->sector_count = 35;
-		info->size = 0x00200000;
-		break;		/* => 2 MB              */
+		info->size = 0x00200000;	/* => 2 MiB */
+		break;
 
 	default:
 		info->flash_id = FLASH_UNKNOWN;
@@ -306,7 +306,7 @@ static ulong flash_get_size(vu_long * addr, flash_info_t * info)
 			info->start[i] = base + (i * 0x00010000);
 	} else {
 		if (info->flash_id & FLASH_BTYPE) {
-			/* set sector offsets for bottom boot block type        */
+			/* set sector offsets for bottom boot block type */
 			info->start[0] = base + 0x00000000;
 			info->start[1] = base + 0x00004000;
 			info->start[2] = base + 0x00006000;
@@ -316,7 +316,7 @@ static ulong flash_get_size(vu_long * addr, flash_info_t * info)
 				    base + (i * 0x00010000) - 0x00030000;
 			}
 		} else {
-			/* set sector offsets for top boot block type           */
+			/* set sector offsets for top boot block type */
 			i = info->sector_count - 1;
 			info->start[i--] = base + info->size - 0x00004000;
 			info->start[i--] = base + info->size - 0x00006000;
@@ -666,7 +666,7 @@ static ulong flash_get_size_2(vu_long * addr, flash_info_t * info)
 		return (0);	/* no or unknown flash  */
 	}
 
-	value = addr2[1];	/* device ID            */
+	value = addr2[1];	/* device ID */
 
 	DEBUGF("\nFLASH DEVICEID: %x\n", value);
 
@@ -675,17 +675,17 @@ static ulong flash_get_size_2(vu_long * addr, flash_info_t * info)
 	case (CFG_FLASH_WORD_SIZE)AMD_ID_LV320T:
 		info->flash_id += FLASH_AM320T;
 		info->sector_count = 71;
-		info->size = 0x00400000;  break;	/* => 4 MB	*/
+		info->size = 0x00400000;  break;	/* => 4 MiB	*/
 
 	case (CFG_FLASH_WORD_SIZE)AMD_ID_LV320B:
 		info->flash_id += FLASH_AM320B;
 		info->sector_count = 71;
-		info->size = 0x00400000;  break;	/* => 4 MB	*/
+		info->size = 0x00400000;  break;	/* => 4 MiB	*/
 
 	case (CFG_FLASH_WORD_SIZE)STM_ID_29W320DT:
 		info->flash_id += FLASH_STMW320DT;
 		info->sector_count = 67;
-		info->size = 0x00400000;  break;	/* => 4 MB	*/
+		info->size = 0x00400000;  break;	/* => 4 MiB	*/
 
 	case (CFG_FLASH_WORD_SIZE)MX_ID_LV320T:
 		info->flash_id += FLASH_MXLV320T;
@@ -743,7 +743,7 @@ static ulong flash_get_size_2(vu_long * addr, flash_info_t * info)
 			info->start[i] = base + i * 0x00010000;
 	} else {
 		if (info->flash_id & FLASH_BTYPE) {
-			/* set sector offsets for bottom boot block type        */
+			/* set sector offsets for bottom boot block type */
 			info->start[0] = base + 0x00000000;
 			info->start[1] = base + 0x00004000;
 			info->start[2] = base + 0x00006000;
@@ -753,7 +753,7 @@ static ulong flash_get_size_2(vu_long * addr, flash_info_t * info)
 				    base + (i * 0x00010000) - 0x00030000;
 			}
 		} else {
-			/* set sector offsets for top boot block type           */
+			/* set sector offsets for top boot block type */
 			i = info->sector_count - 1;
 			info->start[i--] = base + info->size - 0x00004000;
 			info->start[i--] = base + info->size - 0x00006000;
diff --git a/board/cpu87/cpu87.c b/board/cpu87/cpu87.c
index e8c2614eb47..9fecdd0dfef 100644
--- a/board/cpu87/cpu87.c
+++ b/board/cpu87/cpu87.c
@@ -294,15 +294,15 @@ long int initdram (int board_type)
 	 */
 	size8 = try_init (memctl, CFG_PSDMR_8COL, CFG_OR2_8COL,
 			  (uchar *) CFG_SDRAM_BASE);
-	
+
 	size9 = try_init (memctl, CFG_PSDMR_9COL, CFG_OR2_9COL,
 			  (uchar *) CFG_SDRAM_BASE);
-	
+
 	size10 = try_init (memctl, CFG_PSDMR_10COL, CFG_OR2_10COL,
 			  (uchar *) CFG_SDRAM_BASE);
-	
+
 	psize = max(size8,max(size9,size10));
-	
+
 	if (psize == size8) {
 		psize = try_init (memctl, CFG_PSDMR_8COL, CFG_OR2_8COL,
 				  (uchar *) CFG_SDRAM_BASE);
diff --git a/board/mcc200/mcc200.c b/board/mcc200/mcc200.c
index 9c5780998ea..71a691b5dbf 100644
--- a/board/mcc200/mcc200.c
+++ b/board/mcc200/mcc200.c
@@ -265,8 +265,8 @@ int misc_init_r (void)
 		*(volatile int*)MPC5XXX_CS0_CFG &= ~(1 << 6);
 		printf ("Warning: Only 32 of 64 MB of Flash are accessible from U-Boot\n");
 		flash_info[0].size = 32 << 20;
-		for (snum = 0, flash_sup_end = gd->bd->bi_flashstart + (32<<20); 
-			flash_info[0].start[snum] < flash_sup_end; 
+		for (snum = 0, flash_sup_end = gd->bd->bi_flashstart + (32<<20);
+			flash_info[0].start[snum] < flash_sup_end;
 			snum++);
 		flash_info[0].sector_count = snum;
 	}
diff --git a/board/tqm5200/tqm5200.c b/board/tqm5200/tqm5200.c
index c8350ab3b5d..2a0d542ef8b 100644
--- a/board/tqm5200/tqm5200.c
+++ b/board/tqm5200/tqm5200.c
@@ -743,7 +743,7 @@ int board_early_init_f (void)
 
 	/* Read in TIMER_3 pin status */
 	timer3_status = *(vu_long *)MPC5XXX_GPT3_STATUS;
-	
+
 #ifdef FO300_SILENT_CONSOLE_WHEN_S1_CLOSED
 	/* Force silent console mode if S1 switch
 	 * is in closed position (TIMER_3 pin status is LOW). */
@@ -757,5 +757,5 @@ int board_early_init_f (void)
 
 	return 0;
 }
-#endif
-#endif
+#endif	/* CONFIG_FO300 */
+#endif	/* CONFIG_BOARD_EARLY_INIT_F */
diff --git a/cpu/i386/sc520.c b/cpu/i386/sc520.c
index 1c4370b0819..d0a73418827 100644
--- a/cpu/i386/sc520.c
+++ b/cpu/i386/sc520.c
@@ -149,7 +149,7 @@ unsigned long init_sc520_dram(void)
 	/* these memory control registers are set up in the assember part,
 	 * in sc520_asm.S, during 'mem_init'.  If we muck with them here,
 	 * after we are running a stack in RAM, we have troubles.  Besides,
-	 * these refresh and delay values are better ? simply specified 
+	 * these refresh and delay values are better ? simply specified
 	 * outright in the include/configs/{cfg} file since the HW designer
 	 * simply dictates it.
 	 */
diff --git a/cpu/i386/sc520_asm.S b/cpu/i386/sc520_asm.S
index e1fa37a4a61..8fc713d93bb 100644
--- a/cpu/i386/sc520_asm.S
+++ b/cpu/i386/sc520_asm.S
@@ -462,7 +462,7 @@ emptybank:
 
 #if defined CFG_SDRAM_DRCTMCTL
 	/* just have your hardware desinger _GIVE_ you what you need here! */
-	movl    $DRCTMCTL, %edi   
+	movl    $DRCTMCTL, %edi
 	movb    $CFG_SDRAM_DRCTMCTL,%al
 	movb    (%edi), %al
 #else
@@ -477,7 +477,7 @@ emptybank:
 #ifdef CFG_SDRAM_CAS_LATENCY_3T
 	orb     $0x10, %al
 #endif
-	movb    %al, (%edi) 
+	movb    %al, (%edi)
 #endif
 #endif
 	movl    $DRCCTL, %edi            /* DRAM Control register */
@@ -537,7 +537,7 @@ bank0: 	movl	(%edi), %eax
 	movl	%eax, %ebx
 
 
-done:	
+done:
 	movl	%ebx, %eax
 
 #if CFG_SDRAM_ECC_ENABLE
@@ -547,7 +547,7 @@ done:
 	movl	$0x1, %edi
 memtest0:
 	movb	$0xa5, (%edi)
-	cmpb    $0xa5, (%edi) 
+	cmpb    $0xa5, (%edi)
 	jne	out
 	shrl	$1, %ecx
 	andl	%ecx,%ecx
@@ -571,11 +571,11 @@ set_ecc:
 			/* enable NMI mapping for ECC */
 	movl    $ECCINT, %edi
 	mov	$0x10, %al
-	movb    %al, (%edi) 
+	movb    %al, (%edi)
 			/* Turn on ECC */
 	movl    $ECCCTL, %edi
 	mov	$0x05, %al
-	movb    %al, (%edi) 
+	movb    %al, (%edi)
 #endif
 out:
 	movl	%ebx, %eax
diff --git a/cpu/ppc4xx/440spe_pcie.c b/cpu/ppc4xx/440spe_pcie.c
index 2e920aadf01..b2621c2ec5b 100644
--- a/cpu/ppc4xx/440spe_pcie.c
+++ b/cpu/ppc4xx/440spe_pcie.c
@@ -169,7 +169,7 @@ static void ppc440spe_setup_utl(u32 port) {
 		break;
 	}
 	utl_base = (unsigned int *)(CFG_PCIE_BASE + 0x1000 * port);
-	
+
 	/*
 	 * Set buffer allocations and then assert VRB and TXE.
 	 */
diff --git a/include/configs/CPU87.h b/include/configs/CPU87.h
index 7a1dada2db5..ce969ecdd18 100644
--- a/include/configs/CPU87.h
+++ b/include/configs/CPU87.h
@@ -527,7 +527,7 @@
 			 PSDMR_LDOTOPRE_1C		|\
 			 PSDMR_WRC_1C			|\
 			 PSDMR_CL_2)
-			 
+
 /*
  * Init Memory Controller:
  *