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authorMasahiro Yamada <yamada.m@jp.panasonic.com>2015-02-12 18:49:33 +0900
committerSimon Glass <sjg@chromium.org>2015-02-19 06:19:19 -0700
commitba25779384671c533a778e53d59fe3f317bfefa8 (patch)
treed414bd87e6c72abcbcc3d206bc9ae80c00859497
parentf11199f0d0495177fe17e651e99955dc7494ab52 (diff)
Documentation: gpio: fix bindings document
[ imported from Linux Kernel, commit 74981fb81d83 ] Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Simon Glass <sjg@chromium.org>
-rw-r--r--doc/device-tree-bindings/gpio/gpio.txt5
1 files changed, 3 insertions, 2 deletions
diff --git a/doc/device-tree-bindings/gpio/gpio.txt b/doc/device-tree-bindings/gpio/gpio.txt
index b9bd1d64cf..f7a158d858 100644
--- a/doc/device-tree-bindings/gpio/gpio.txt
+++ b/doc/device-tree-bindings/gpio/gpio.txt
@@ -69,7 +69,8 @@ GPIO pin number, and GPIO flags as accepted by the "qe_pio_e" gpio-controller.
----------------------------------
A gpio-specifier should contain a flag indicating the GPIO polarity; active-
-high or active-low. If it does, the follow best practices should be followed:
+high or active-low. If it does, the following best practices should be
+followed:
The gpio-specifier's polarity flag should represent the physical level at the
GPIO controller that achieves (or represents, for inputs) a logically asserted
@@ -147,7 +148,7 @@ contains information structures as follows:
numeric-gpio-range ::=
<pinctrl-phandle> <gpio-base> <pinctrl-base> <count>
named-gpio-range ::= <pinctrl-phandle> <gpio-base> '<0 0>'
- gpio-phandle : phandle to pin controller node.
+ pinctrl-phandle : phandle to pin controller node
gpio-base : Base GPIO ID in the GPIO controller
pinctrl-base : Base pinctrl pin ID in the pin controller
count : The number of GPIOs/pins in this range