diff options
author | Anton Vorontsov <avorontsov@ru.mvista.com> | 2008-01-09 20:57:40 +0300 |
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committer | Kim Phillips <kim.phillips@freescale.com> | 2008-01-10 20:52:47 -0600 |
commit | b3d2cde7a3aa1e83b7968cdff929e52c8cc617bb (patch) | |
tree | 4667a4fa0a5d6ac4fd9812aaeede1b06ac23809b | |
parent | 977b57583a7c34010e566a09a679ec3c1836f996 (diff) |
mpc83xx: add "fsl, qe" compatible fixups
New device trees will use "fsl,qe" compatible properties.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
-rw-r--r-- | cpu/mpc83xx/fdt.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/cpu/mpc83xx/fdt.c b/cpu/mpc83xx/fdt.c index f21c54e80bc..909171fd4f3 100644 --- a/cpu/mpc83xx/fdt.c +++ b/cpu/mpc83xx/fdt.c @@ -52,6 +52,12 @@ void ft_cpu_setup(void *blob, bd_t *bd) "bus-frequency", gd->qe_clk, 1); do_fixup_by_prop_u32(blob, "device_type", "qe", 4, "brg-frequency", gd->brg_clk, 1); + do_fixup_by_compat_u32(blob, "fsl,qe", + "clock-frequency", gd->qe_clk, 1); + do_fixup_by_compat_u32(blob, "fsl,qe", + "bus-frequency", gd->qe_clk, 1); + do_fixup_by_compat_u32(blob, "fsl,qe", + "brg-frequency", gd->brg_clk, 1); #endif #ifdef CFG_NS16550 |