diff options
author | Philippe Schenker <philippe.schenker@toradex.com> | 2022-05-20 16:14:39 +0200 |
---|---|---|
committer | Philippe Schenker <philippe.schenker@toradex.com> | 2022-05-20 16:14:39 +0200 |
commit | fef4b016a4189ed147d1bdbe29bc93ca41cad40c (patch) | |
tree | 7827a983eb9c7fda716b13845c19306678eb6a65 | |
parent | 6b020e53c02f064ca0b932679abf2619a9049995 (diff) | |
parent | 06d688e8193ffdb5461bf3485aaf782ff98791b0 (diff) |
Merge tag 'rel_imx_5.4.70_2.3.6' into toradex_imx_v2020.04_5.4.70_2.3.0
"rel_imx_5.4.70_2.3.6"
-rw-r--r-- | arch/arm/dts/imx8mm-ab2-u-boot.dtsi | 11 | ||||
-rw-r--r-- | arch/arm/dts/imx8mm-ab2.dts | 43 | ||||
-rw-r--r-- | arch/arm/dts/imx8mn-ab2-u-boot.dtsi | 11 | ||||
-rw-r--r-- | arch/arm/dts/imx8mn-ab2.dts | 43 | ||||
-rw-r--r-- | arch/arm/mach-imx/imx8/cpu.c | 15 | ||||
-rw-r--r-- | board/freescale/imx8mm_ab2/imx8mm_ab2.c | 74 | ||||
-rw-r--r-- | board/freescale/imx8mm_ab2/spl.c | 2 | ||||
-rw-r--r-- | board/freescale/imx8mq_evk/spl.c | 18 | ||||
-rw-r--r-- | configs/imx8mm_ab2_defconfig | 23 | ||||
-rw-r--r-- | configs/imx8mm_ab2_fspi_defconfig | 23 | ||||
-rw-r--r-- | configs/imx8mm_ddr4_ab2_defconfig | 23 | ||||
-rw-r--r-- | configs/imx8mm_ddr4_ab2_nand_defconfig | 23 | ||||
-rw-r--r-- | configs/imx8mn_ab2_defconfig | 18 | ||||
-rw-r--r-- | configs/imx8mn_ddr4_ab2_defconfig | 18 | ||||
-rw-r--r-- | drivers/watchdog/imx_watchdog.c | 2 | ||||
-rw-r--r-- | include/configs/imx8dxl_evk.h | 4 | ||||
-rw-r--r-- | include/configs/imx8mm_ab2.h | 15 | ||||
-rw-r--r-- | include/configs/imx8mn_ab2.h | 17 |
18 files changed, 375 insertions, 8 deletions
diff --git a/arch/arm/dts/imx8mm-ab2-u-boot.dtsi b/arch/arm/dts/imx8mm-ab2-u-boot.dtsi index b19020f70d..37a4e826c8 100644 --- a/arch/arm/dts/imx8mm-ab2-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-ab2-u-boot.dtsi @@ -4,12 +4,23 @@ */ / { + aliases { + usbgadget0 = &usbg1; + }; + firmware { optee { compatible = "linaro,optee-tz"; method = "smc"; }; }; + + usbg1: usbg1 { + compatible = "fsl,imx27-usb-gadget"; + dr_mode = "peripheral"; + chipidea,usb = <&usbotg1>; + status = "okay"; + }; }; &{/soc@0} { diff --git a/arch/arm/dts/imx8mm-ab2.dts b/arch/arm/dts/imx8mm-ab2.dts index 4f346c20c0..442a7188ee 100644 --- a/arch/arm/dts/imx8mm-ab2.dts +++ b/arch/arm/dts/imx8mm-ab2.dts @@ -5,6 +5,7 @@ /dts-v1/; +#include <dt-bindings/usb/pd.h> #include "imx8mm.dtsi" / { @@ -455,6 +456,31 @@ scl-gpios = <&gpio5 16 GPIO_ACTIVE_HIGH>; sda-gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>; status = "okay"; + + ptn5150: tcpc@1d { + compatible = "nxp,ptn5150"; + reg = <0x1d>; + status = "okay"; + + port { + typec1_dr_sw: endpoint { + remote-endpoint = <&usb1_drd_sw>; + }; + }; + + typec1_con: connector { + compatible = "usb-c-connector"; + label = "USB-C"; + power-role = "dual"; + data-role = "dual"; + try-power-role = "sink"; + source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; + sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM) + PDO_VAR(5000, 20000, 3000)>; + op-sink-microwatt = <15000000>; + self-powered; + }; + }; }; &i2c3 { @@ -498,6 +524,23 @@ status = "okay"; }; +&usbotg1 { + picophy,pre-emp-curr-control = <3>; + picophy,dc-vol-level-adjust = <7>; + dr_mode = "host"; + hnp-disable; + srp-disable; + adp-disable; + usb-role-switch; + status = "okay"; + + port { + usb1_drd_sw: endpoint { + remote-endpoint = <&typec1_dr_sw>; + }; + }; +}; + &wdog1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_wdog>; diff --git a/arch/arm/dts/imx8mn-ab2-u-boot.dtsi b/arch/arm/dts/imx8mn-ab2-u-boot.dtsi index d4c5e43477..8b5115b2fb 100644 --- a/arch/arm/dts/imx8mn-ab2-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-ab2-u-boot.dtsi @@ -4,12 +4,23 @@ */ / { + aliases { + usbgadget0 = &usbg1; + }; + firmware { optee { compatible = "linaro,optee-tz"; method = "smc"; }; }; + + usbg1: usbg1 { + compatible = "fsl,imx27-usb-gadget"; + dr_mode = "peripheral"; + chipidea,usb = <&usbotg1>; + status = "okay"; + }; }; &{/soc@0} { diff --git a/arch/arm/dts/imx8mn-ab2.dts b/arch/arm/dts/imx8mn-ab2.dts index 9685eeb3d5..119f90b02d 100644 --- a/arch/arm/dts/imx8mn-ab2.dts +++ b/arch/arm/dts/imx8mn-ab2.dts @@ -5,6 +5,7 @@ /dts-v1/; +#include <dt-bindings/usb/pd.h> #include "imx8mn.dtsi" / { @@ -418,6 +419,31 @@ scl-gpios = <&gpio5 16 GPIO_ACTIVE_HIGH>; sda-gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>; status = "okay"; + + ptn5150: tcpc@1d { + compatible = "nxp,ptn5150"; + reg = <0x1d>; + status = "okay"; + + port { + typec1_dr_sw: endpoint { + remote-endpoint = <&usb1_drd_sw>; + }; + }; + + typec1_con: connector { + compatible = "usb-c-connector"; + label = "USB-C"; + power-role = "dual"; + data-role = "dual"; + try-power-role = "sink"; + source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; + sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM) + PDO_VAR(5000, 20000, 3000)>; + op-sink-microwatt = <15000000>; + self-powered; + }; + }; }; &i2c3 { @@ -498,6 +524,23 @@ status = "okay"; }; +&usbotg1 { + picophy,pre-emp-curr-control = <3>; + picophy,dc-vol-level-adjust = <7>; + dr_mode = "host"; + hnp-disable; + srp-disable; + adp-disable; + usb-role-switch; + status = "okay"; + + port { + usb1_drd_sw: endpoint { + remote-endpoint = <&typec1_dr_sw>; + }; + }; +}; + &wdog1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_wdog>; diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c index c8fa86c929..8685196912 100644 --- a/arch/arm/mach-imx/imx8/cpu.c +++ b/arch/arm/mach-imx/imx8/cpu.c @@ -949,18 +949,25 @@ u32 get_cpu_rev(void) u32 id = 0, rev = 0; int ret; + /* returns ID - chip id [4:0], chip revision [9:5]*/ ret = sc_misc_get_control(-1, SC_R_SYSTEM, SC_C_ID, &id); if (ret) return 0; + /* Extract silicon version */ rev = (id >> 5) & 0xf; + /* Extract chip ID and add dummy */ id = (id & 0x1f) + MXC_SOC_IMX8; /* Dummy ID for chip */ - /* 8DXL uses A1/A2, so generate dummy rev to differentiate with B/C */ - if (id == MXC_CPU_IMX8DXL && rev != 0) - rev = 0x10 + rev; + /* 8DXL A1: use dummy rev to differentiate from B */ + if (id == MXC_CPU_IMX8DXL && rev == CHIP_REV_B) + rev = CHIP_REV_A1; + /* 8DXL B0: detect as B instead of C */ + else if (id == MXC_CPU_IMX8DXL && rev == CHIP_REV_C) + rev = CHIP_REV_B; - return (id << 12) | rev; + /* return Chip ID in [31:12] and silicon ver in [11:0]*/ + return (id << 12) | (rev & 0xfff); } static bool check_device_power_off(struct udevice *dev, diff --git a/board/freescale/imx8mm_ab2/imx8mm_ab2.c b/board/freescale/imx8mm_ab2/imx8mm_ab2.c index 4483a8a81d..544211bec9 100644 --- a/board/freescale/imx8mm_ab2/imx8mm_ab2.c +++ b/board/freescale/imx8mm_ab2/imx8mm_ab2.c @@ -25,6 +25,8 @@ #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/mxc_i2c.h> #include <spl.h> +#include <usb.h> +#include "../common/tcpc.h" DECLARE_GLOBAL_DATA_PTR; @@ -121,12 +123,84 @@ int board_phy_config(struct phy_device *phydev) return 0; } +#ifdef CONFIG_USB_TCPC +struct tcpc_port port1; + +struct tcpc_port_config port1_config = { + .i2c_bus = 1, /* i2c2*/ + .addr = 0x1d, + .port_type = TYPEC_PORT_UFP, + .max_snk_mv = 5000, + .max_snk_ma = 3000, + .max_snk_mw = 15000, + .op_snk_mv = 9000, +}; + +static int setup_typec(void) +{ + int ret; + + ret = tcpc_init(&port1, port1_config, NULL); + if (ret) { + printf("%s: tcpc port1 init failed, err=%d\n", __func__, ret); + } + + return ret; +} + +int board_usb_init(int index, enum usb_init_type init) +{ + int ret = 0; + + imx8m_usb_power(index, true); + + if (init == USB_INIT_HOST) + tcpc_setup_dfp_mode(&port1); + else + tcpc_setup_ufp_mode(&port1); + + return ret; +} + +int board_usb_cleanup(int index, enum usb_init_type init) +{ + int ret = 0; + + if (init == USB_INIT_HOST) + ret = tcpc_disable_src_vbus(&port1); + + imx8m_usb_power(index, false); + + return ret; +} + +int board_ehci_usb_phy_mode(struct udevice *dev) +{ + enum typec_cc_polarity pol; + enum typec_cc_state state; + int ret = 0; + + tcpc_setup_ufp_mode(&port1); + ret = tcpc_get_cc_status(&port1, &pol, &state); + if (!ret) { + if (state == TYPEC_STATE_SRC_RD_RA || state == TYPEC_STATE_SRC_RD) + return USB_INIT_HOST; + } + + return USB_INIT_DEVICE; +} +#endif + int board_init(void) { #ifdef CONFIG_DM_REGULATOR regulators_enable_boot_on(false); #endif +#ifdef CONFIG_USB_TCPC + setup_typec(); +#endif + #ifdef CONFIG_FEC_MXC setup_fec(); #endif diff --git a/board/freescale/imx8mm_ab2/spl.c b/board/freescale/imx8mm_ab2/spl.c index 8dd03906a6..e1dd434242 100644 --- a/board/freescale/imx8mm_ab2/spl.c +++ b/board/freescale/imx8mm_ab2/spl.c @@ -51,7 +51,7 @@ int spl_board_boot_device(enum boot_device boot_dev_spl) case NAND_BOOT: return BOOT_DEVICE_NAND; case USB_BOOT: - return BOOT_DEVICE_NONE; + return BOOT_DEVICE_BOARD; default: return BOOT_DEVICE_NONE; } diff --git a/board/freescale/imx8mq_evk/spl.c b/board/freescale/imx8mq_evk/spl.c index bb8211dd7c..120810a111 100644 --- a/board/freescale/imx8mq_evk/spl.c +++ b/board/freescale/imx8mq_evk/spl.c @@ -218,6 +218,21 @@ int board_fit_config_name_match(const char *name) } #endif +#define GPR_PCIE_VREG_BYPASS BIT(12) +static void enable_pcie_vreg(bool enable) +{ + struct iomuxc_gpr_base_regs *gpr = + (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; + + if (!enable) { + setbits_le32(&gpr->gpr[14], GPR_PCIE_VREG_BYPASS); + setbits_le32(&gpr->gpr[16], GPR_PCIE_VREG_BYPASS); + } else { + clrbits_le32(&gpr->gpr[14], GPR_PCIE_VREG_BYPASS); + clrbits_le32(&gpr->gpr[16], GPR_PCIE_VREG_BYPASS); + } +} + void board_init_f(ulong dummy) { int ret; @@ -225,6 +240,9 @@ void board_init_f(ulong dummy) /* Clear the BSS. */ memset(__bss_start, 0, __bss_end - __bss_start); + /* PCIE_VPH connects to 3.3v on EVK, enable VREG to generate 1.8V to PHY */ + enable_pcie_vreg(true); + arch_cpu_init(); init_uart_clk(0); diff --git a/configs/imx8mm_ab2_defconfig b/configs/imx8mm_ab2_defconfig index 78744cdc89..9a89e74a2e 100644 --- a/configs/imx8mm_ab2_defconfig +++ b/configs/imx8mm_ab2_defconfig @@ -65,6 +65,14 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_CLK_COMPOSITE_CCF=y CONFIG_CLK_IMX8MM=y CONFIG_MXC_GPIO=y +CONFIG_FASTBOOT=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_CMD_FASTBOOT=y +CONFIG_ANDROID_BOOT_IMAGE=y +CONFIG_FASTBOOT_UUU_SUPPORT=y +CONFIG_FASTBOOT_BUF_ADDR=0x42800000 +CONFIG_FASTBOOT_BUF_SIZE=0x40000000 +CONFIG_FASTBOOT_FLASH=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y @@ -104,5 +112,20 @@ CONFIG_SYSRESET=y CONFIG_SYSRESET_PSCI=y CONFIG_DM_THERMAL=y CONFIG_NXP_TMU=y +CONFIG_USB_TCPC=y +CONFIG_USB=y +CONFIG_USB_GADGET=y +CONFIG_DM_USB=y +CONFIG_CI_UDC=y +CONFIG_USB_EHCI_HCD=y + +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 + +CONFIG_SPL_USB_HOST_SUPPORT=y +CONFIG_SPL_USB_GADGET=y +CONFIG_SPL_USB_SDP_SUPPORT=y +CONFIG_SDP_LOADADDR=0x40400000 CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/imx8mm_ab2_fspi_defconfig b/configs/imx8mm_ab2_fspi_defconfig index 62d7b01b6a..52d533ad5c 100644 --- a/configs/imx8mm_ab2_fspi_defconfig +++ b/configs/imx8mm_ab2_fspi_defconfig @@ -66,6 +66,14 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_CLK_COMPOSITE_CCF=y CONFIG_CLK_IMX8MM=y CONFIG_MXC_GPIO=y +CONFIG_FASTBOOT=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_CMD_FASTBOOT=y +CONFIG_ANDROID_BOOT_IMAGE=y +CONFIG_FASTBOOT_UUU_SUPPORT=y +CONFIG_FASTBOOT_BUF_ADDR=0x42800000 +CONFIG_FASTBOOT_BUF_SIZE=0x40000000 +CONFIG_FASTBOOT_FLASH=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y @@ -105,5 +113,20 @@ CONFIG_SYSRESET=y CONFIG_SYSRESET_PSCI=y CONFIG_DM_THERMAL=y CONFIG_NXP_TMU=y +CONFIG_USB_TCPC=y +CONFIG_USB=y +CONFIG_USB_GADGET=y +CONFIG_DM_USB=y +CONFIG_CI_UDC=y +CONFIG_USB_EHCI_HCD=y + +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 + +CONFIG_SPL_USB_HOST_SUPPORT=y +CONFIG_SPL_USB_GADGET=y +CONFIG_SPL_USB_SDP_SUPPORT=y +CONFIG_SDP_LOADADDR=0x40400000 CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/imx8mm_ddr4_ab2_defconfig b/configs/imx8mm_ddr4_ab2_defconfig index 1788bb21aa..eca5bb5b1e 100644 --- a/configs/imx8mm_ddr4_ab2_defconfig +++ b/configs/imx8mm_ddr4_ab2_defconfig @@ -64,6 +64,14 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_CLK_COMPOSITE_CCF=y CONFIG_CLK_IMX8MM=y CONFIG_MXC_GPIO=y +CONFIG_FASTBOOT=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_CMD_FASTBOOT=y +CONFIG_ANDROID_BOOT_IMAGE=y +CONFIG_FASTBOOT_UUU_SUPPORT=y +CONFIG_FASTBOOT_BUF_ADDR=0x42800000 +CONFIG_FASTBOOT_BUF_SIZE=0x40000000 +CONFIG_FASTBOOT_FLASH=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y @@ -90,6 +98,21 @@ CONFIG_SYSRESET=y CONFIG_SYSRESET_PSCI=y CONFIG_DM_THERMAL=y CONFIG_NXP_TMU=y +CONFIG_USB_TCPC=y +CONFIG_USB=y +CONFIG_USB_GADGET=y +CONFIG_DM_USB=y +CONFIG_CI_UDC=y +CONFIG_USB_EHCI_HCD=y + +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 + +CONFIG_SPL_USB_HOST_SUPPORT=y +CONFIG_SPL_USB_GADGET=y +CONFIG_SPL_USB_SDP_SUPPORT=y +CONFIG_SDP_LOADADDR=0x40400000 CONFIG_CMD_NAND=y CONFIG_CMD_UBI=y diff --git a/configs/imx8mm_ddr4_ab2_nand_defconfig b/configs/imx8mm_ddr4_ab2_nand_defconfig index d4a862849b..a3f3b959d1 100644 --- a/configs/imx8mm_ddr4_ab2_nand_defconfig +++ b/configs/imx8mm_ddr4_ab2_nand_defconfig @@ -62,6 +62,14 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_CLK_COMPOSITE_CCF=y CONFIG_CLK_IMX8MM=y CONFIG_MXC_GPIO=y +CONFIG_FASTBOOT=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_CMD_FASTBOOT=y +CONFIG_ANDROID_BOOT_IMAGE=y +CONFIG_FASTBOOT_UUU_SUPPORT=y +CONFIG_FASTBOOT_BUF_ADDR=0x42800000 +CONFIG_FASTBOOT_BUF_SIZE=0x40000000 +CONFIG_FASTBOOT_FLASH=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y @@ -88,6 +96,21 @@ CONFIG_SYSRESET=y CONFIG_SYSRESET_PSCI=y CONFIG_DM_THERMAL=y CONFIG_NXP_TMU=y +CONFIG_USB_TCPC=y +CONFIG_USB=y +CONFIG_USB_GADGET=y +CONFIG_DM_USB=y +CONFIG_CI_UDC=y +CONFIG_USB_EHCI_HCD=y + +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 + +CONFIG_SPL_USB_HOST_SUPPORT=y +CONFIG_SPL_USB_GADGET=y +CONFIG_SPL_USB_SDP_SUPPORT=y +CONFIG_SDP_LOADADDR=0x40400000 CONFIG_CMD_NAND=y CONFIG_CMD_UBI=y diff --git a/configs/imx8mn_ab2_defconfig b/configs/imx8mn_ab2_defconfig index 83d0cae063..889a89f6cb 100644 --- a/configs/imx8mn_ab2_defconfig +++ b/configs/imx8mn_ab2_defconfig @@ -70,6 +70,14 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_CLK_COMPOSITE_CCF=y CONFIG_CLK_IMX8MN=y CONFIG_MXC_GPIO=y +CONFIG_FASTBOOT=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_CMD_FASTBOOT=y +CONFIG_ANDROID_BOOT_IMAGE=y +CONFIG_FASTBOOT_UUU_SUPPORT=y +CONFIG_FASTBOOT_BUF_ADDR=0x42800000 +CONFIG_FASTBOOT_BUF_SIZE=0x40000000 +CONFIG_FASTBOOT_FLASH=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y @@ -109,5 +117,15 @@ CONFIG_SYSRESET=y CONFIG_SYSRESET_PSCI=y CONFIG_DM_THERMAL=y CONFIG_NXP_TMU=y +CONFIG_USB_TCPC=y +CONFIG_USB=y +CONFIG_USB_GADGET=y +CONFIG_DM_USB=y +CONFIG_CI_UDC=y +CONFIG_USB_EHCI_HCD=y + +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/imx8mn_ddr4_ab2_defconfig b/configs/imx8mn_ddr4_ab2_defconfig index d346408b8d..2bd8e8826b 100644 --- a/configs/imx8mn_ddr4_ab2_defconfig +++ b/configs/imx8mn_ddr4_ab2_defconfig @@ -70,6 +70,14 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_CLK_COMPOSITE_CCF=y CONFIG_CLK_IMX8MN=y CONFIG_MXC_GPIO=y +CONFIG_FASTBOOT=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_CMD_FASTBOOT=y +CONFIG_ANDROID_BOOT_IMAGE=y +CONFIG_FASTBOOT_UUU_SUPPORT=y +CONFIG_FASTBOOT_BUF_ADDR=0x42800000 +CONFIG_FASTBOOT_BUF_SIZE=0x40000000 +CONFIG_FASTBOOT_FLASH=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y @@ -109,5 +117,15 @@ CONFIG_SYSRESET=y CONFIG_SYSRESET_PSCI=y CONFIG_DM_THERMAL=y CONFIG_NXP_TMU=y +CONFIG_USB_TCPC=y +CONFIG_USB=y +CONFIG_USB_GADGET=y +CONFIG_DM_USB=y +CONFIG_CI_UDC=y +CONFIG_USB_EHCI_HCD=y + +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/drivers/watchdog/imx_watchdog.c b/drivers/watchdog/imx_watchdog.c index 01762df019..47b9422f12 100644 --- a/drivers/watchdog/imx_watchdog.c +++ b/drivers/watchdog/imx_watchdog.c @@ -44,7 +44,7 @@ void __attribute__((weak)) reset_cpu(ulong addr) { struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR; - imx_watchdog_expire_now(wdog, true); + imx_watchdog_expire_now(wdog, false); } #endif diff --git a/include/configs/imx8dxl_evk.h b/include/configs/imx8dxl_evk.h index 4d2df35987..ccd81ab5da 100644 --- a/include/configs/imx8dxl_evk.h +++ b/include/configs/imx8dxl_evk.h @@ -290,9 +290,9 @@ /* total DDR is 1GB */ #if defined(CONFIG_TARGET_IMX8DXL_DDR3_EVK) -#define PHYS_SDRAM_1_SIZE 0x20000000 +#define PHYS_SDRAM_1_SIZE 0x1FF00000 /* 512MB - ECC region 1MB */ #else -#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1 GB */ +#define PHYS_SDRAM_1_SIZE 0x3FE00000 /* 1 GB - ECC region 2MB */ #endif #define PHYS_SDRAM_2_SIZE 0x00000000 diff --git a/include/configs/imx8mm_ab2.h b/include/configs/imx8mm_ab2.h index ed93602591..546aa47408 100644 --- a/include/configs/imx8mm_ab2.h +++ b/include/configs/imx8mm_ab2.h @@ -53,6 +53,7 @@ #define CONFIG_CMD_READ #define CONFIG_SERIAL_TAG +#define CONFIG_FASTBOOT_USB_DEV 0 #define CONFIG_REMAKE_ELF /* ENET Config */ @@ -300,4 +301,18 @@ #define CONFIG_SYS_I2C_SPEED 100000 +/* USB configs */ +#ifndef CONFIG_SPL_BUILD +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#define CONFIG_USBD_HS +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USB_FUNCTION_MASS_STORAGE +#endif + +#define CONFIG_USB_GADGET_VBUS_DRAW 2 +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 + #endif diff --git a/include/configs/imx8mn_ab2.h b/include/configs/imx8mn_ab2.h index cf116ff3cc..16027de06f 100644 --- a/include/configs/imx8mn_ab2.h +++ b/include/configs/imx8mn_ab2.h @@ -281,4 +281,21 @@ #define CONFIG_SYS_I2C_SPEED 100000 +/* USB configs */ +#ifndef CONFIG_SPL_BUILD +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#define CONFIG_USBD_HS + +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USB_FUNCTION_MASS_STORAGE + +#endif + +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 + #endif |