diff options
| author | TsiChungLiew <Tsi-Chung.Liew@freescale.com> | 2007-11-07 17:56:15 -0600 |
|---|---|---|
| committer | TsiChungLiew <Tsi-Chung.Liew@freescale.com> | 2007-11-07 17:56:15 -0600 |
| commit | 248c7c14835f34d5d910b45e5600050e58ca6cab (patch) | |
| tree | 0f0eabfe90c88dcc89749bf1aef1c123121d805e | |
| parent | d9240a5f827eb3b476a6ba2938d01f1a9e7688f4 (diff) | |
ColdFire: MCF532x - Update do_reset() using core reset
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
| -rw-r--r-- | cpu/mcf532x/cpu.c | 8 | ||||
| -rw-r--r-- | include/asm-m68k/immap_5329.h | 3 | ||||
| -rwxr-xr-x[-rw-r--r--] | include/asm-m68k/m5329.h | 15 |
3 files changed, 19 insertions, 7 deletions
diff --git a/cpu/mcf532x/cpu.c b/cpu/mcf532x/cpu.c index 2f62e956cc..89cc8ad930 100644 --- a/cpu/mcf532x/cpu.c +++ b/cpu/mcf532x/cpu.c @@ -35,14 +35,10 @@ DECLARE_GLOBAL_DATA_PTR; int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[]) { - volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG); + volatile rcm_t *rcm = (rcm_t *) (MMAP_RCM); - wdp->cr = 0; udelay(1000); - - /* enable watchdog, set timeout to 0 and wait */ - wdp->cr = WTM_WCR_EN; - while (1) ; + rcm->rcr |= RCM_RCR_SOFTRST; /* we don't return! */ return 0; diff --git a/include/asm-m68k/immap_5329.h b/include/asm-m68k/immap_5329.h index 2a3980c130..dd86e7d982 100644 --- a/include/asm-m68k/immap_5329.h +++ b/include/asm-m68k/immap_5329.h @@ -57,7 +57,8 @@ #define MMAP_PWM 0xFC090000 #define MMAP_EPORT 0xFC094000 #define MMAP_WDOG 0xFC098000 -#define MMAP_CCM 0xFC0A0000 +#define MMAP_RCM 0xFC0A0000 +#define MMAP_CCM 0xFC0A0004 #define MMAP_GPIO 0xFC0A4000 #define MMAP_RTC 0xFC0A8000 #define MMAP_LCDC 0xFC0AC000 diff --git a/include/asm-m68k/m5329.h b/include/asm-m68k/m5329.h index cd69fb0b5a..3f056511cb 100644..100755 --- a/include/asm-m68k/m5329.h +++ b/include/asm-m68k/m5329.h @@ -246,6 +246,21 @@ #define CSCR_BSTW (0x00000008) /********************************************************************* +* Reset Controller Module (RCM) +*********************************************************************/ + +/* Bit definitions and macros for RCR */ +#define RCM_RCR_FRCRSTOUT (0x40) +#define RCM_RCR_SOFTRST (0x80) + +/* Bit definitions and macros for RSR */ +#define RCM_RSR_LOL (0x01) +#define RCM_RSR_WDR_CORE (0x02) +#define RCM_RSR_EXT (0x04) +#define RCM_RSR_POR (0x08) +#define RCM_RSR_SOFT (0x20) + +/********************************************************************* * FlexCAN Module (CAN) *********************************************************************/ /* Bit definitions and macros for CAN_CANMCR */ |