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authorStefan Agner <stefan.agner@toradex.com>2014-07-24 13:10:42 +0200
committerStefan Agner <stefan.agner@toradex.com>2014-07-24 13:10:42 +0200
commite8fad1b70bed78e019ada7af3e29bbfce0652094 (patch)
tree5df3e0c4b5089fbe4dafb258e59994e4c28f42ec
parent320a3a8340c4c5289a12d6de78411bdfd72738f8 (diff)
vf610: improve CPU type detection
Detect VF5xx CPU's by reading the CPU count register. Also we can guess the second number of the CPU type (VF6x0) which indicates the presence of a L2 cache.
-rw-r--r--arch/arm/cpu/armv7/vf610/generic.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/vf610/generic.c b/arch/arm/cpu/armv7/vf610/generic.c
index a26d63ebe01..e1b3f4dc790 100644
--- a/arch/arm/cpu/armv7/vf610/generic.c
+++ b/arch/arm/cpu/armv7/vf610/generic.c
@@ -283,7 +283,11 @@ static char *get_reset_cause(void)
int print_cpuinfo(void)
{
- printf("CPU: Freescale Vybrid VF610 at %d MHz\n",
+ struct mscm *mscm = (struct mscm *)MSCM_BASE_ADDR;
+
+ printf("CPU: Freescale Vybrid VF%c%c0 at %d MHz\n",
+ mscm->cpxcount ? '6' : '5', /* Dual Core => VF6x0 */
+ mscm->cpxcfg1 ? '1' : '0', /* L2 Cache => VFx10 */
mxc_get_clock(MXC_ARM_CLK) / 1000000);
printf("Reset cause: %s\n", get_reset_cause());