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authorTom Rini <trini@ti.com>2012-03-16 07:55:32 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-03-29 08:19:29 +0200
commit33fbc9cf826c1dd54ab5a715154478fae008fcd2 (patch)
tree8618febf6b7f39add0b656b8840f9191aa791efe
parent96a78ac0c445999ce21fb42ecab061479b4d7056 (diff)
sdrc.c: Fix typo in do_sdrc_init() for SPL
We need to setup CS0 and CS1 not CS0 and CS0 again. Signed-off-by: Tom Rini <trini@ti.com>
-rw-r--r--arch/arm/cpu/armv7/omap3/sdrc.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3/sdrc.c
index 91f42c0e2c..f6d9b97bb4 100644
--- a/arch/arm/cpu/armv7/omap3/sdrc.c
+++ b/arch/arm/cpu/armv7/omap3/sdrc.c
@@ -180,7 +180,7 @@ void do_sdrc_init(u32 cs, u32 early)
write_sdrc_timings(CS0, sdrc_actim_base0, mcfg, ctrla, ctrlb,
rfr_ctrl, mr);
make_cs1_contiguous();
- write_sdrc_timings(CS0, sdrc_actim_base1, mcfg, ctrla, ctrlb,
+ write_sdrc_timings(CS1, sdrc_actim_base1, mcfg, ctrla, ctrlb,
rfr_ctrl, mr);
#endif