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authorDipen Dudhat <dipen.dudhat@freescale.com>2010-03-18 19:21:49 +0530
committerScott Sweeny <scott.sweeny@timesys.com>2010-11-10 14:52:26 -0500
commite1a0f09d7f0de5b1b59b622a5c61971c7701765e (patch)
tree51ac8c3abf6b52557fcd6860b70760682851817b
parent921a50f144c307dd3ab3e9343de8c5bfd22bb4c8 (diff)
use maximum timeout for eSDHC
The hardware may take longer to timeout, but it's much better than having a too-short timeout value. This patch is derived from P2020DS BSP Release. Signed-off-by: Jin Qing <b24347@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com>
-rw-r--r--drivers/mmc/fsl_esdhc.c4
-rw-r--r--include/configs/P1_P2_RDB.h1
2 files changed, 5 insertions, 0 deletions
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index ed14b2f42b..662359127a 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -217,6 +217,10 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data)
if (timeout < 0)
timeout = 0;
+#ifdef CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
+ timeout = 14;
+#endif
+
clrsetbits_be32(&regs->sysctl, SYSCTL_TIMEOUT_MASK, timeout << 16);
return 0;
diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h
index ebbdf15299..f45390f70e 100644
--- a/include/configs/P1_P2_RDB.h
+++ b/include/configs/P1_P2_RDB.h
@@ -557,6 +557,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_FSL_ESDHC
#define CONFIG_GENERIC_MMC
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
+#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
#endif
#define CONFIG_USB_EHCI