summaryrefslogtreecommitdiff
path: root/CHANGELOG
diff options
context:
space:
mode:
authorWolfgang Denk <wd@pollux.denx.de>2006-03-12 18:09:47 +0100
committerWolfgang Denk <wd@pollux.denx.de>2006-03-12 18:09:47 +0100
commit034698329067f74b66a457aaf8924f7b054996eb (patch)
tree7e2e1bd8a829e434d90983a5e9699040d196e6db /CHANGELOG
parentd8169c9f3ba04f5e470008c59afa3161ce683524 (diff)
Fix a HW timing issue on 8548 CDS for eTSEC 3 in RGMII mode
Patch by Andy Fleming, 14 Jun 2005
Diffstat (limited to 'CHANGELOG')
-rw-r--r--CHANGELOG3
1 files changed, 3 insertions, 0 deletions
diff --git a/CHANGELOG b/CHANGELOG
index 272463280b..bdd6fc62f7 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,9 @@
Changes since U-Boot 1.1.4:
======================================================================
+* Fix a HW timing issue on 8548 CDS for eTSEC 3 in RGMII mode
+ Patch by Andy Fleming, 14 Jun 2005
+
* Fix bad register definitions for LTX971 PHY on MPC85xx boards.
Patch by Gerhard Jaeger, 21 Jun 2005