diff options
| author | Alexey Brodkin <abrodkin@synopsys.com> | 2015-11-10 19:16:25 +0300 |
|---|---|---|
| committer | Alexey Brodkin <abrodkin@synopsys.com> | 2015-11-18 00:39:22 +0300 |
| commit | fb2dea60e8f355ae00d427db09112a90839c96ec (patch) | |
| tree | 3d1e605b91438b8b096de5ca0f2d6872a0ae1e41 /arch/arc | |
| parent | db1f17f894b15402f3d1d43f7d273a42668b8ab4 (diff) | |
board: axs10x switch serial port and Ethernet to driver model
With this change Synopsys DesignWare SDP board is switched to driver
model for both serial port (serial_dw) and Ethernet (Designware GMAC).
This simplifies include/configs/axs101.h and allows for reuse of Linux's
Device Tree description.
For simplicity Linux's .dts files are not blindly copied but only very
few extracts of them are really used (those that are supported in U-Boot
at the moment).
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arc')
| -rw-r--r-- | arch/arc/dts/Makefile | 1 | ||||
| -rw-r--r-- | arch/arc/dts/axs10x.dts | 45 |
2 files changed, 46 insertions, 0 deletions
diff --git a/arch/arc/dts/Makefile b/arch/arc/dts/Makefile index d481fcdc699..d4772ecabb9 100644 --- a/arch/arc/dts/Makefile +++ b/arch/arc/dts/Makefile @@ -2,6 +2,7 @@ # SPDX-License-Identifier: GPL-2.0+ # +dtb-$(CONFIG_TARGET_AXS101) += axs10x.dtb dtb-$(CONFIG_TARGET_ARCANGEL4) += arcangel4.dtb dtb-$(CONFIG_TARGET_TB100) += abilis_tb100.dtb diff --git a/arch/arc/dts/axs10x.dts b/arch/arc/dts/axs10x.dts new file mode 100644 index 00000000000..8fe1837baa5 --- /dev/null +++ b/arch/arc/dts/axs10x.dts @@ -0,0 +1,45 @@ +/* + * Copyright (C) 2015 Synopsys, Inc. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/dts-v1/; + +#include "skeleton.dtsi" + +/ { + #address-cells = <1>; + #size-cells = <1>; + + aliases { + console = &uart0; + }; + + clocks { + apbclk: apbclk { + compatible = "fixed-clock"; + clock-frequency = <50000000>; + #clock-cells = <0>; + }; + }; + + uart0: serial0@e0022000 { + compatible = "snps,dw-apb-uart"; + reg = <0xe0022000 0x1000>; + reg-shift = <2>; + reg-io-width = <4>; + }; + + ethernet@e0018000 { + #interrupt-cells = <1>; + compatible = "altr,socfpga-stmmac"; + reg = < 0xe0018000 0x2000 >; + interrupts = < 25 >; + interrupt-names = "macirq"; + phy-mode = "gmii"; + snps,pbl = < 32 >; + clocks = <&apbclk>; + clock-names = "stmmaceth"; + max-speed = <100>; + }; +}; |