diff options
author | Wolfgang Denk <wd@denx.de> | 2010-10-07 21:51:12 +0200 |
---|---|---|
committer | Wolfgang Denk <wd@denx.de> | 2010-10-18 22:07:10 +0200 |
commit | 14d0a02a168b36e87665b8d7f42fa3e88263d26d (patch) | |
tree | 576843229c10eb3e8836dc40a12d3f6f0c26a3ce /arch/arm/cpu/arm720t | |
parent | d24f2d321d8e78e990d100000d8efc4845c78b1c (diff) |
Rename TEXT_BASE into CONFIG_SYS_TEXT_BASE
The change is currently needed to be able to remove the board
configuration scripting from the top level Makefile and replace it by
a simple, table driven script.
Moving this configuration setting into the "CONFIG_*" name space is
also desirable because it is needed if we ever should move forward to
a Kconfig driven configuration system.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'arch/arm/cpu/arm720t')
-rw-r--r-- | arch/arm/cpu/arm720t/start.S | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index 6a8d57b09c9..d93911f566b 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -77,7 +77,7 @@ _fiq: .word fiq .globl _TEXT_BASE _TEXT_BASE: - .word TEXT_BASE + .word CONFIG_SYS_TEXT_BASE #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) .globl _armboot_start @@ -298,11 +298,11 @@ relocate: /* relocate U-Boot to RAM */ cmp r0, r1 /* don't reloc during debug */ beq stack_setup -#if TEXT_BASE +#if CONFIG_SYS_TEXT_BASE #ifndef CONFIG_LPC2292 /* already done in lowlevel_init */ ldr r2, =0x0 /* Relocate the exception vectors */ cmp r1, r2 /* and associated data to address */ - ldmneia r0!, {r3-r10} /* 0x0. Do nothing if TEXT_BASE is */ + ldmneia r0!, {r3-r10} /* 0x0. Do nothing if CONFIG_SYS_TEXT_BASE is */ stmneia r2!, {r3-r10} /* 0x0. Copy the first 15 words. */ ldmneia r0, {r3-r9} stmneia r2, {r3-r9} @@ -755,7 +755,7 @@ reset_cpu: ldr r0, [r1, #+NETARM_MEM_CS0_BASE_ADDR] ldr r1, =0xFFFFF000 and r0, r1, r0 - ldr r1, =(relocate-TEXT_BASE) + ldr r1, =(relocate-CONFIG_SYS_TEXT_BASE) add r0, r1, r0 ldr r4, =NETARM_GEN_MODULE_BASE ldr r1, =NETARM_GEN_SW_SVC_RESETA |