diff options
| author | Konstantin Porotchkin <kostap@marvell.com> | 2021-03-16 17:20:52 +0100 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2021-04-29 07:39:15 +0200 |
| commit | 236f17ce1405ee248cfd92ec9b65087ff2e2fce2 (patch) | |
| tree | 47d225774b6f6f4f792c57258b77fced067ad060 /arch/arm/dts/cn9130-crb-A.dts | |
| parent | c864c41f19f898f44c49936858c2de0a22dcf1f2 (diff) | |
arm: octeontx2: Add dtsi/dts files for Octeon TX2 CN9130 CRB
This patch adds the dtsi/dts files needed to support the Marvell
Octeon TX2 CN9130 CRB. This is only the base port with not all
interfaces supported fully.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'arch/arm/dts/cn9130-crb-A.dts')
| -rw-r--r-- | arch/arm/dts/cn9130-crb-A.dts | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/arch/arm/dts/cn9130-crb-A.dts b/arch/arm/dts/cn9130-crb-A.dts new file mode 100644 index 0000000000..fa21ef314c --- /dev/null +++ b/arch/arm/dts/cn9130-crb-A.dts @@ -0,0 +1,57 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Marvell International Ltd. + */ + +#include "cn9130-crb.dtsi" + +/ { + model = "CN9130-CRB-A"; + compatible = "marvell,cn9130-crb-A", + "marvell,cn9130", + "marvell,armada-ap806-quad", + "marvell,armada-ap806"; +}; + +&cp0_comphy { + phy0 { + phy-type = <PHY_TYPE_PEX0>; + }; + + phy1 { + phy-type = <PHY_TYPE_PEX0>; + }; + + phy2 { + phy-type = <PHY_TYPE_PEX0>; + }; + + phy3 { + phy-type = <PHY_TYPE_PEX0>; + }; + + phy4 { + phy-type = <PHY_TYPE_SFI>; + phy-speed = <PHY_SPEED_10_3125G>; + }; + + phy5 { + phy-type = <PHY_TYPE_SGMII2>; + phy-speed = <PHY_SPEED_3_125G>; + }; +}; + +&cp0_pcie0 { + num-lanes = <4>; + /* non-prefetchable memory */ + ranges =<0x82000000 0 0xc0000000 0 0xc0000000 0 0x2000000>; + status = "disabled"; +}; + +&cp0_usb3_0 { + status = "okay"; +}; + +&cp0_usb3_1 { + status = "okay"; +}; |