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authorIan Ray <ian.ray@ge.com>2019-01-31 16:21:12 +0200
committerStefano Babic <sbabic@denx.de>2019-04-13 20:30:08 +0200
commitefc260a9af922c0e8860109b1e9e9634f3a7965d (patch)
tree2b9038840dee2ca2b1d6b54e02d0be82ae4e6d54 /arch/arm/dts/imx6q-bx50v3.dts
parentd93e3ba6e370c108f75ac8ebd5353003767b3e79 (diff)
board: ge: bx50v3: Enable CONFIG_DM_MMC
Use MMC device model, and remove USDHC pin configuration code since the pinctrl driver is used. Signed-off-by: Ian Ray <ian.ray@ge.com>
Diffstat (limited to 'arch/arm/dts/imx6q-bx50v3.dts')
-rw-r--r--arch/arm/dts/imx6q-bx50v3.dts47
1 files changed, 47 insertions, 0 deletions
diff --git a/arch/arm/dts/imx6q-bx50v3.dts b/arch/arm/dts/imx6q-bx50v3.dts
index 10b12998cd2..0fff2195f98 100644
--- a/arch/arm/dts/imx6q-bx50v3.dts
+++ b/arch/arm/dts/imx6q-bx50v3.dts
@@ -13,3 +13,50 @@
model = "General Electric Bx50v3";
compatible = "ge,imx6q-bx50v3", "advantech,imx6q-ba16", "fsl,imx6q";
};
+
+&iomuxc {
+ pinctrl-names = "default";
+
+ pinctrl_usdhc3: usdhc3grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
+ MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
+ MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
+ MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
+ MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
+ >;
+ };
+
+ pinctrl_usdhc3_reset: usdhc3grp-reset {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_RST__SD3_RESET 0x170F9
+ >;
+ };
+};
+
+&usdhc1 {
+ status = "disabled";
+};
+
+&usdhc2 {
+ status = "disabled";
+};
+
+/* eMMC */
+&usdhc3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc3 &pinctrl_usdhc3_reset>;
+ bus-width = <8>;
+ non-removable;
+ keep-power-in-suspend;
+ status = "okay";
+};
+
+&usdhc4 {
+ status = "disabled";
+};