diff options
author | Ye Li <ye.li@nxp.com> | 2020-04-21 19:57:12 -0700 |
---|---|---|
committer | Ye Li <ye.li@nxp.com> | 2020-04-26 23:36:37 -0700 |
commit | 5420ad92be4d5626dacaf43b12b4918aaa7c7bea (patch) | |
tree | cc09a9edd391a2e668ec8fa257be2b55e99878a4 /arch/arm/dts/imx8mp-evk-u-boot.dtsi | |
parent | acda6bd6bf79e53a05beadd7b9cabbe9c500e327 (diff) |
MLK-23574-37 DTS: imx8mp: Update iMX8MP EVK DTS and binding files
Update DTS files to support FEC, eQoS, DWC3 USB and flexspi
1. Update nodes and assigned clocks for flexspi, FEC, eQos
2. Add nodes for DWC3 USB
3. Add i2c force idle
4. Add thermal nodes
Signed-off-by: Ye Li <ye.li@nxp.com>
Diffstat (limited to 'arch/arm/dts/imx8mp-evk-u-boot.dtsi')
-rw-r--r-- | arch/arm/dts/imx8mp-evk-u-boot.dtsi | 38 |
1 files changed, 30 insertions, 8 deletions
diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi index b67ff70ae7..f189087b26 100644 --- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi @@ -20,6 +20,10 @@ &clk { u-boot,dm-spl; u-boot,dm-pre-reloc; + /delete-property/ assigned-clocks; + /delete-property/ assigned-clock-parents; + /delete-property/ assigned-clock-rates; + }; &osc_32k { @@ -49,6 +53,10 @@ u-boot,dm-spl; }; +&pinctrl_reg_usdhc2_vmmc { + u-boot,dm-spl; +}; + ®_usdhc2_vmmc { u-boot,dm-spl; }; @@ -105,26 +113,40 @@ u-boot,dm-spl; }; -&i2c4 { +&pinctrl_i2c1 { u-boot,dm-spl; }; -&i2c5 { +&usdhc1 { u-boot,dm-spl; + assigned-clocks = <&clk IMX8MP_CLK_USDHC1>; + assigned-clock-rates = <400000000>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_400M>; }; -&i2c6 { +&usdhc2 { u-boot,dm-spl; + assigned-clocks = <&clk IMX8MP_CLK_USDHC2>; + assigned-clock-rates = <400000000>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_400M>; }; -&usdhc1 { +&usdhc3 { u-boot,dm-spl; + assigned-clocks = <&clk IMX8MP_CLK_USDHC3>; + assigned-clock-rates = <400000000>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_400M>; }; -&usdhc2 { - u-boot,dm-spl; +&eqos { + compatible = "fsl,imx-eqos"; + /delete-property/ assigned-clocks; + /delete-property/ assigned-clock-parents; + /delete-property/ assigned-clock-rates; }; -&usdhc3 { - u-boot,dm-spl; +&flexspi { + assigned-clock-rates = <100000000>; + assigned-clocks = <&clk IMX8MP_CLK_QSPI>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_100M>; }; |