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author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2019-04-12 18:55:50 +0900 |
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committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2019-04-17 07:22:23 +0900 |
commit | cd33feda6bc8ca9c49b612aa42f8f30e7a241762 (patch) | |
tree | 65f4d03eb3f9591ea2ac7f5bff6d23ea93196cd5 /arch/arm/dts/uniphier-sld8.dtsi | |
parent | 216800acf1fbf9f498455bf3c92d4513d9a4c681 (diff) |
ARM: dts: uniphier: sync with Linux 5.1-rc4
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/dts/uniphier-sld8.dtsi')
-rw-r--r-- | arch/arm/dts/uniphier-sld8.dtsi | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/dts/uniphier-sld8.dtsi b/arch/arm/dts/uniphier-sld8.dtsi index f7fcf6b4599..efce02768b6 100644 --- a/arch/arm/dts/uniphier-sld8.dtsi +++ b/arch/arm/dts/uniphier-sld8.dtsi @@ -239,6 +239,16 @@ }; }; + dmac: dma-controller@5a000000 { + compatible = "socionext,uniphier-mio-dmac"; + reg = <0x5a000000 0x1000>; + interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>, + <0 71 4>, <0 72 4>, <0 73 4>; + clocks = <&mio_clk 7>; + resets = <&mio_rst 7>; + #dma-cells = <1>; + }; + sd: sdhc@5a400000 { compatible = "socionext,uniphier-sd-v2.91"; status = "disabled"; @@ -250,6 +260,8 @@ clocks = <&mio_clk 0>; reset-names = "host", "bridge"; resets = <&mio_rst 0>, <&mio_rst 3>; + dma-names = "rx-tx"; + dmas = <&dmac 4>; bus-width = <4>; cap-sd-highspeed; sd-uhs-sdr12; @@ -267,6 +279,8 @@ clocks = <&mio_clk 1>; reset-names = "host", "bridge", "hw"; resets = <&mio_rst 1>, <&mio_rst 4>, <&mio_rst 6>; + dma-names = "rx-tx"; + dmas = <&dmac 6>; bus-width = <8>; cap-mmc-highspeed; cap-mmc-hw-reset; |