tegra3: Add GPIO header

This header supplies the necessary T30 parts for GPIO access. Since the
Tegra3 just adds new fields and they will use the same driver, we move
the structure into the common header.

BUG=chromium-os:21033
TEST=build and boot on seaboard

Change-Id: I3ebf128358d118fc43469ffff839af5027bc6472
Reviewed-on: http://gerrit.chromium.org/gerrit/8693
Reviewed-by: Che-Liang Chiou <clchiou@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>

1 files changed, 58 insertions, 0 deletions

diff --git a/arch/arm/include/asm/arch-tegra3/gpio.h b/arch/arm/include/asm/arch-tegra3/gpio.h
new file mode 100644
index 0000000000..4febdcf12d
--- /dev/null
+++ b/arch/arm/include/asm/arch-tegra3/gpio.h
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2011 The Chromium OS Authors.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _TEGRA3_GPIO_H_
+#define _TEGRA3_GPIO_H_
+
+#define CONFIG_TEGRA_MAX_GPIO_PORT	30	/* GPIO_PEEx */
+
+/*
+ * The Tegra 3x GPIO controller has 246 GPIOs arranged in 8 banks of 4 ports,
+ * each with 8 GPIOs.
+ */
+#include <asm/arch-tegra/gpio.h>
+
+#define GPIO_PCC0   224
+#define GPIO_PCC1   225
+#define GPIO_PCC2   226
+#define GPIO_PCC3   227
+#define GPIO_PCC4   228
+#define GPIO_PCC5   229
+#define GPIO_PCC6   230
+#define GPIO_PCC7   231
+#define GPIO_PDD0   232
+#define GPIO_PDD1   233
+#define GPIO_PDD2   234
+#define GPIO_PDD3   235
+#define GPIO_PDD4   236
+#define GPIO_PDD5   237
+#define GPIO_PDD6   238
+#define GPIO_PDD7   239
+#define GPIO_PEE0   240
+#define GPIO_PEE1   241
+#define GPIO_PEE2   242
+#define GPIO_PEE3   243
+#define GPIO_PEE4   244
+#define GPIO_PEE5   245
+#define GPIO_PEE6   246
+#define GPIO_PEE7   247
+
+#endif	/* TEGRA3_GPIO_H_ */