diff options
| author | Peng Fan <peng.fan@nxp.com> | 2015-12-23 10:52:01 +0800 |
|---|---|---|
| committer | Max Krummenacher <max.krummenacher@toradex.com> | 2016-06-22 14:36:39 +0200 |
| commit | eb5f9d279d2f1140ddc4204f9b0bf02422ebabda (patch) | |
| tree | 8db63877bec9e03dc3d6ae62f9d3c8ee65602525 /arch/arm/include | |
| parent | 7505f1934ae86e29710eaa881ddfe7660c0b9421 (diff) | |
MLK-12066 imx: mx7: default enable MDIO open drain
The management data input/output (MDIO) requires open-drain,
i.MX7D TO1.0 ENET MDIO pin has no open drain, but TO1.1 supports
this feature. So to TO1.1, need to enable open drain by setting
bits GPR0[8:7] for TO1.1.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/arch-mx7/imx-regs.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-mx7/imx-regs.h b/arch/arm/include/asm/arch-mx7/imx-regs.h index 532b0daa6f..cf888314f7 100644 --- a/arch/arm/include/asm/arch-mx7/imx-regs.h +++ b/arch/arm/include/asm/arch-mx7/imx-regs.h @@ -273,6 +273,8 @@ struct src { #define IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL5_SHIFT 5 #define IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL6_MASK 0x40u #define IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL6_SHIFT 6 +#define IOMUXC_GPR_GPR0_ENET_MDIO_OPEN_DRAIN_MASK (3 << 7) +#define IOMUXC_GPR_GPR0_ENET_MDIO_OPEN_DRAIN_SHIFT 7 /* GPR1 Bit Fields */ #define IOMUXC_GPR_GPR1_GPR_WEIM_ACT_CS0_MASK 0x1u #define IOMUXC_GPR_GPR1_GPR_WEIM_ACT_CS0_SHIFT 0 |