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authorMark Kettenis <kettenis@openbsd.org>2021-02-10 20:14:55 +0100
committerTom Rini <trini@konsulko.com>2021-07-09 11:36:12 -0400
commitbfb798461af42ac628e22cbf5a0576fa156e8787 (patch)
tree01b70bc25a91cdc1544e681ea0680d93352f1b16 /arch/arm/lib/cache-cp15.c
parentfd075f77ca56ffb07e0b1979f0cb47fc8831600f (diff)
armv8: Handle EL2 Host mode
On implementations that support VHE, the layout of the CPTR_EL2 register depends on whether HCR_EL2.E2H is set. If the bit is set, CPTR_EL2 uses the same layout as CPACR_EL1 and can in fact be accessed through that register. In that case, jump to the EL1 code to enable access to the FP/SIMD registers. This allows U-Boot to run on systems that pass control to U-Boot in EL2 with EL2 Host mode enabled such as machines using Apple's M1 SoC. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Acked-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'arch/arm/lib/cache-cp15.c')
0 files changed, 0 insertions, 0 deletions