diff options
| author | Michał Barnaś <barnas@google.com> | 2024-03-19 18:18:13 +0000 |
|---|---|---|
| committer | Tien Fong Chee <tien.fong.chee@intel.com> | 2024-04-15 11:15:11 +0800 |
| commit | 2b8eabbaf2e2aa19455d880fd13af8c20f72b81f (patch) | |
| tree | 40351d4d68581e52b5754fa26dc4467a8bc642e0 /arch/arm/mach-socfpga/spl_a10.c | |
| parent | b03b49046af5dfca599d2ce8f0aafed89b97aa91 (diff) | |
arm: socfpga: arria10: add option to reprogram the FPGA every reboot
Add Kconfig that enables FPGA reprogramming with warm boot on Arria 10.
This option allows to change the bitstream on the filesystem and apply
changes with warm reboot without the need for a power cycle.
Signed-off-by: Michał Barnaś <barnas@google.com>
Diffstat (limited to 'arch/arm/mach-socfpga/spl_a10.c')
| -rw-r--r-- | arch/arm/mach-socfpga/spl_a10.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c index 9edbbf4a29c..3981d2d4f14 100644 --- a/arch/arm/mach-socfpga/spl_a10.c +++ b/arch/arm/mach-socfpga/spl_a10.c @@ -122,7 +122,10 @@ void spl_board_init(void) arch_early_init_r(); /* If the full FPGA is already loaded, ie.from EPCQ, config fpga pins */ - if (is_fpgamgr_user_mode()) { + if ((IS_ENABLED(CONFIG_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM) && + is_regular_boot_valid()) || + (!IS_ENABLED(CONFIG_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM) && + is_fpgamgr_user_mode())) { ret = config_pins(gd->fdt_blob, "shared"); if (ret) return; @@ -130,7 +133,8 @@ void spl_board_init(void) ret = config_pins(gd->fdt_blob, "fpga"); if (ret) return; - } else if (!is_fpgamgr_early_user_mode()) { + } else if (IS_ENABLED(CONFIG_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM) || + !is_fpgamgr_early_user_mode()) { /* Program IOSSM(early IO release) or full FPGA */ fpgamgr_program(buf, FPGA_BUFSIZ, 0); |