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authorTom Rini <trini@konsulko.com>2024-07-03 14:42:11 -0600
committerTom Rini <trini@konsulko.com>2024-07-03 14:42:11 -0600
commitf0a259c25f60f4da72707a54dbd2f990d24d0d82 (patch)
treea30ef3441fb7d8289c84d38ad0cc04552840c6b2 /arch/powerpc/lib/cache.c
parent005105b11cefe694dcd40572639973fbb9b31646 (diff)
parent7d6cee2cd0e2e2507aca1e3a6fe0e2cb241a116e (diff)
Merge patch series "m68k: Implement a default flush_dcache_all"
Tom Rini <trini@konsulko.com> says: Prior to this series we had some de-facto required cache functions that were either unimplemented on some architectures or differently named. This would lead in some cases to having multiple "weak" functions available as well. Rework things so that an architecture must provide these functions and it is up to that architecture if a "weak" default function makes sense, or not.
Diffstat (limited to 'arch/powerpc/lib/cache.c')
-rw-r--r--arch/powerpc/lib/cache.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/powerpc/lib/cache.c b/arch/powerpc/lib/cache.c
index e480b269649..a9cd7b8d30a 100644
--- a/arch/powerpc/lib/cache.c
+++ b/arch/powerpc/lib/cache.c
@@ -5,6 +5,7 @@
*/
#include <cpu_func.h>
+#include <stdio.h>
#include <asm/cache.h>
#include <watchdog.h>
@@ -43,3 +44,17 @@ void flush_cache(ulong start_addr, ulong size)
/* flush prefetch queue */
asm volatile("isync" : : : "memory");
}
+
+/*
+ * Default implementation:
+ * do a range flush for the entire range
+ */
+void flush_dcache_all(void)
+{
+ flush_dcache_range(0, ~0);
+}
+
+void invalidate_icache_all(void)
+{
+ puts("No arch specific invalidate_icache_all available!\n");
+}