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authorGabriel Huau <contact@huau-gabriel.fr>2015-04-25 08:13:11 -0700
committerSimon Glass <sjg@chromium.org>2015-04-29 18:51:50 -0600
commit8ddb8cfb1a4edee9c413381b5350e62b0ed701a0 (patch)
treed1196b8752a31471e4b47da188d78983b823daa8 /arch/x86/dts/minnowmax.dts
parentcc4c8aca1de4a0a6ef81460217f64c4b76de5340 (diff)
x86: minnowmax: use the correct NOR in the configuration
The SPI NOR on the minnowboard max is a MICRON N25Q064A Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/dts/minnowmax.dts')
-rw-r--r--arch/x86/dts/minnowmax.dts2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index 4be227a3b0..0233f61417 100644
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -74,7 +74,7 @@
compatible = "intel,ich-spi";
spi-flash@0 {
reg = <0>;
- compatible = "sst,25vf016b", "spi-flash";
+ compatible = "stmicro,n25q064a", "spi-flash";
memory-map = <0xff800000 0x00800000>;
};
};