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authorBin Meng <bmeng.cn@gmail.com>2015-02-02 22:35:25 +0800
committerSimon Glass <sjg@chromium.org>2015-02-06 12:07:40 -0700
commit3c8ae536ec26ffc7715e38876b43f88286a98fd8 (patch)
tree869c4c7a517a439953bb5fbb14601c8c5055f1a1 /arch/x86
parentfaa832329932c4559a8d03d4212881b6146da5df (diff)
x86: Define macros for pci configuration space access
Move PCI_REG_ADDR and PCI_REG_DATA from arch/x86/lib/pci_type1.c to arch/x86/include/asm/pci.h, also define PCI_CFG_EN so that these macros can be used for pci configuration space access. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/include/asm/pci.h13
-rw-r--r--arch/x86/lib/pci_type1.c7
2 files changed, 13 insertions, 7 deletions
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index c30dd4c218..a153dd1622 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -1,4 +1,3 @@
-
/*
* (C) Copyright 2002
* Daniel Engström, Omicron Ceti AB, daniel@omicron.se
@@ -9,6 +8,14 @@
#ifndef _PCI_I386_H_
#define _PCI_I386_H_
+/* bus mapping constants (used for PCI core initialization) */
+#define PCI_REG_ADDR 0xcf8
+#define PCI_REG_DATA 0xcfc
+
+#define PCI_CFG_EN 0x80000000
+
+#ifndef __ASSEMBLY__
+
#define DEFINE_PCI_DEVICE_TABLE(_table) \
const struct pci_device_id _table[]
@@ -49,4 +56,6 @@ void pci_write_config8(pci_dev_t dev, unsigned where, unsigned value);
void pci_write_config16(pci_dev_t dev, unsigned where, unsigned value);
void pci_write_config32(pci_dev_t dev, unsigned where, unsigned value);
-#endif
+#endif /* __ASSEMBLY__ */
+
+#endif /* _PCI_I386_H_ */
diff --git a/arch/x86/lib/pci_type1.c b/arch/x86/lib/pci_type1.c
index 13942a33f7..a251adcacd 100644
--- a/arch/x86/lib/pci_type1.c
+++ b/arch/x86/lib/pci_type1.c
@@ -12,6 +12,7 @@
#include <common.h>
#include <asm/io.h>
#include <pci.h>
+#include <asm/pci.h>
#define cfg_read(val, addr, op) (*val = op((int)(addr)))
#define cfg_write(val, addr, op) op((val), (int)(addr))
@@ -21,7 +22,7 @@ static int \
type1_##rw##_config_##size(struct pci_controller *hose, \
pci_dev_t dev, int offset, type val) \
{ \
- outl(dev | (offset & 0xfc) | 0x80000000, (int)hose->cfg_addr); \
+ outl(dev | (offset & 0xfc) | PCI_CFG_EN, (int)hose->cfg_addr); \
cfg_##rw(val, hose->cfg_data + (offset & mask), op); \
return 0; \
}
@@ -34,10 +35,6 @@ TYPE1_PCI_OP(write, byte, u8, outb, 3)
TYPE1_PCI_OP(write, word, u16, outw, 2)
TYPE1_PCI_OP(write, dword, u32, outl, 0)
-/* bus mapping constants (used for PCI core initialization) */
-#define PCI_REG_ADDR 0x00000cf8
-#define PCI_REG_DATA 0x00000cfc
-
void pci_setup_type1(struct pci_controller *hose)
{
pci_set_ops(hose,