diff options
author | Patrick Delaunay <patrick.delaunay@st.com> | 2020-04-01 09:07:33 +0200 |
---|---|---|
committer | Patrice Chotard <patrice.chotard@st.com> | 2020-04-15 09:08:37 +0200 |
commit | 654706be84322b27ae9524c8def7dda4a71763cf (patch) | |
tree | b25efd7003fff27f82bb1fa9623d2367c477e5a4 /arch | |
parent | de80a2476a829a9e23ddb60ba87104aeb55d9c6a (diff) |
configs: stm32mp1: replace STM32MP1_TRUSTED by TFABOOT
Activate ARCH_SUPPORT_TFABOOT and replace the arch stm32mp
specific config CONFIG_STM32MP1_TRUSTED by the generic CONFIG_TFABOOT
introduced by the commit 535d76a12150 ("armv8: layerscape: Add TFABOOT
support").
This config CONFIG_TFABOOT is activated for the trusted boot chain,
when U-Boot is loaded by TF-A.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/Kconfig | 1 | ||||
-rw-r--r-- | arch/arm/mach-stm32mp/Kconfig | 21 | ||||
-rw-r--r-- | arch/arm/mach-stm32mp/bsec.c | 18 | ||||
-rw-r--r-- | arch/arm/mach-stm32mp/cpu.c | 10 |
4 files changed, 21 insertions, 29 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index bbb1e2738bf..dd41090fc6c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1586,6 +1586,7 @@ config ARCH_STI config ARCH_STM32MP bool "Support STMicroelectronics STM32MP Socs with cortex A" select ARCH_MISC_INIT + select ARCH_SUPPORT_TFABOOT select BOARD_LATE_INIT select CLK select DM diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index 96153693a7e..7b86ce1612f 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -35,9 +35,10 @@ config ENV_SIZE config STM32MP15x bool "Support STMicroelectronics STM32MP15x Soc" - select ARCH_SUPPORT_PSCI if !STM32MP1_TRUSTED + select ARCH_SUPPORT_PSCI if !TFABOOT + select ARM_SMCCC if TFABOOT select CPU_V7A - select CPU_V7_HAS_NONSEC if !STM32MP1_TRUSTED + select CPU_V7_HAS_NONSEC if !TFABOOT select CPU_V7_HAS_VIRT select OF_BOARD_SETUP select PINCTRL_STM32 @@ -45,8 +46,8 @@ config STM32MP15x select STM32_RESET select STM32_SERIAL select SYS_ARCH_TIMER - imply SYSRESET_PSCI if STM32MP1_TRUSTED - imply SYSRESET_SYSCON if !STM32MP1_TRUSTED + imply SYSRESET_PSCI if TFABOOT + imply SYSRESET_SYSCON if !TFABOOT help support of STMicroelectronics SOC STM32MP15x family STM32MP157, STM32MP153 or STM32MP151 @@ -83,19 +84,9 @@ config TARGET_DH_STM32MP1_PDK2 endchoice -config STM32MP1_TRUSTED - bool "Support trusted boot with TF-A" - default y if !SPL - select ARM_SMCCC - help - Say Y here to enable boot with TF-A - Trusted boot chain is : - BootRom => TF-A.stm32 (clock & DDR) => U-Boot.stm32 - TF-A monitor provides proprietary SMC to manage secure devices - config STM32MP1_OPTEE bool "Support trusted boot with TF-A and OP-TEE" - depends on STM32MP1_TRUSTED + depends on TFABOOT default n help Say Y here to enable boot with TF-A and OP-TEE diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c index 3b923f088e7..0d5850b4a9b 100644 --- a/arch/arm/mach-stm32mp/bsec.c +++ b/arch/arm/mach-stm32mp/bsec.c @@ -68,7 +68,7 @@ static bool bsec_read_lock(u32 address, u32 otp) return !!(readl(address + bank) & bit); } -#ifndef CONFIG_STM32MP1_TRUSTED +#ifndef CONFIG_TFABOOT /** * bsec_check_error() - Check status of one otp * @base: base address of bsec IP @@ -273,7 +273,7 @@ static int bsec_program_otp(long base, u32 val, u32 otp) return ret; } -#endif /* CONFIG_STM32MP1_TRUSTED */ +#endif /* CONFIG_TFABOOT */ /* BSEC MISC driver *******************************************************/ struct stm32mp_bsec_platdata { @@ -282,7 +282,7 @@ struct stm32mp_bsec_platdata { static int stm32mp_bsec_read_otp(struct udevice *dev, u32 *val, u32 otp) { -#ifdef CONFIG_STM32MP1_TRUSTED +#ifdef CONFIG_TFABOOT return stm32_smc(STM32_SMC_BSEC, STM32_SMC_READ_OTP, otp, 0, val); @@ -313,7 +313,7 @@ static int stm32mp_bsec_read_otp(struct udevice *dev, u32 *val, u32 otp) static int stm32mp_bsec_read_shadow(struct udevice *dev, u32 *val, u32 otp) { -#ifdef CONFIG_STM32MP1_TRUSTED +#ifdef CONFIG_TFABOOT return stm32_smc(STM32_SMC_BSEC, STM32_SMC_READ_SHADOW, otp, 0, val); @@ -336,7 +336,7 @@ static int stm32mp_bsec_read_lock(struct udevice *dev, u32 *val, u32 otp) static int stm32mp_bsec_write_otp(struct udevice *dev, u32 val, u32 otp) { -#ifdef CONFIG_STM32MP1_TRUSTED +#ifdef CONFIG_TFABOOT return stm32_smc_exec(STM32_SMC_BSEC, STM32_SMC_PROG_OTP, otp, val); @@ -349,7 +349,7 @@ static int stm32mp_bsec_write_otp(struct udevice *dev, u32 val, u32 otp) static int stm32mp_bsec_write_shadow(struct udevice *dev, u32 val, u32 otp) { -#ifdef CONFIG_STM32MP1_TRUSTED +#ifdef CONFIG_TFABOOT return stm32_smc_exec(STM32_SMC_BSEC, STM32_SMC_WRITE_SHADOW, otp, val); @@ -362,7 +362,7 @@ static int stm32mp_bsec_write_shadow(struct udevice *dev, u32 val, u32 otp) static int stm32mp_bsec_write_lock(struct udevice *dev, u32 val, u32 otp) { -#ifdef CONFIG_STM32MP1_TRUSTED +#ifdef CONFIG_TFABOOT if (val == 1) return stm32_smc_exec(STM32_SMC_BSEC, STM32_SMC_WRLOCK_OTP, @@ -473,7 +473,7 @@ static int stm32mp_bsec_ofdata_to_platdata(struct udevice *dev) return 0; } -#ifndef CONFIG_STM32MP1_TRUSTED +#ifndef CONFIG_TFABOOT static int stm32mp_bsec_probe(struct udevice *dev) { int otp; @@ -500,7 +500,7 @@ U_BOOT_DRIVER(stm32mp_bsec) = { .ofdata_to_platdata = stm32mp_bsec_ofdata_to_platdata, .platdata_auto_alloc_size = sizeof(struct stm32mp_bsec_platdata), .ops = &stm32mp_bsec_ops, -#ifndef CONFIG_STM32MP1_TRUSTED +#ifndef CONFIG_TFABOOT .probe = stm32mp_bsec_probe, #endif }; diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c index 9aa57943345..74d03fa7dd8 100644 --- a/arch/arm/mach-stm32mp/cpu.c +++ b/arch/arm/mach-stm32mp/cpu.c @@ -76,7 +76,7 @@ #define PKG_MASK GENMASK(2, 0) #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) -#ifndef CONFIG_STM32MP1_TRUSTED +#ifndef CONFIG_TFABOOT static void security_init(void) { /* Disable the backup domain write protection */ @@ -136,7 +136,7 @@ static void security_init(void) writel(BIT(0), RCC_MP_AHB5ENSETR); writel(0x0, GPIOZ_SECCFGR); } -#endif /* CONFIG_STM32MP1_TRUSTED */ +#endif /* CONFIG_TFABOOT */ /* * Debug init @@ -150,7 +150,7 @@ static void dbgmcu_init(void) } #endif /* !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) */ -#if !defined(CONFIG_STM32MP1_TRUSTED) && \ +#if !defined(CONFIG_TFABOOT) && \ (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)) /* get bootmode from ROM code boot context: saved in TAMP register */ static void update_bootmode(void) @@ -198,7 +198,7 @@ int arch_cpu_init(void) #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) dbgmcu_init(); -#ifndef CONFIG_STM32MP1_TRUSTED +#ifndef CONFIG_TFABOOT security_init(); update_bootmode(); #endif @@ -214,7 +214,7 @@ int arch_cpu_init(void) if ((boot_mode & TAMP_BOOT_DEVICE_MASK) == BOOT_SERIAL_UART) gd->flags |= GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE; #if defined(CONFIG_DEBUG_UART) && \ - !defined(CONFIG_STM32MP1_TRUSTED) && \ + !defined(CONFIG_TFABOOT) && \ (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)) else debug_uart_init(); |