diff options
| author | Lokesh Vutla <lokeshvutla@ti.com> | 2014-05-15 11:08:42 +0530 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-05-23 19:40:04 -0400 |
| commit | 02847fcc9278aba56157e254af1c0798319ffba9 (patch) | |
| tree | fd412af5a23136b094151935fb057c5015672c74 /arch | |
| parent | 9fcf3d3a1d9c28619c7a8a1c5b4bad80216744a8 (diff) | |
ARM: DRA7xx: ctrl: Fix efuse register addresses
Efuse register addresses are wrongly programmed.
Fixing the same.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/cpu/armv7/omap5/prcm-regs.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c b/arch/arm/cpu/armv7/omap5/prcm-regs.c index 7292161f3cb..ff08ef42479 100644 --- a/arch/arm/cpu/armv7/omap5/prcm-regs.c +++ b/arch/arm/cpu/armv7/omap5/prcm-regs.c @@ -447,10 +447,10 @@ struct omap_sys_ctrl_regs const dra7xx_ctrl = { .control_wkup_control_spare_r = 0x4AE0C5B4, .control_wkup_control_spare_r_c0 = 0x4AE0C5B8, .control_srcomp_east_side_wkup = 0x4AE0C5BC, - .control_efuse_1 = 0x4AE0C5C0, - .control_efuse_2 = 0x4AE0C5C4, - .control_efuse_3 = 0x4AE0C5C8, - .control_efuse_4 = 0x4AE0C5CC, + .control_efuse_1 = 0x4AE0C5C8, + .control_efuse_2 = 0x4AE0C5CC, + .control_efuse_3 = 0x4AE0C5D0, + .control_efuse_4 = 0x4AE0C5D4, .control_efuse_13 = 0x4AE0C5F0, }; |