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authorJagan Teki <jagan@amarulasolutions.com>2019-01-18 22:18:13 +0530
committerJagan Teki <jagan@amarulasolutions.com>2019-01-18 22:19:08 +0530
commit99ba4308701c51dcf425dbef42c6f87fcc9c42a2 (patch)
treead89625ddc26b1b29bdc21b6d963e5a6e2014b6c /arch
parent0d47bc70565102388c957ead7deac4b2eaa3dfba (diff)
reset: Add Allwinner RESET driver
Add common reset driver for all Allwinner SoC's. Since CLK and RESET share common DT compatible, it is CLK driver job is to bind the reset driver. So add CLK bind call on respective SoC driver by passing ccu map descriptor so-that reset deassert, deassert operations held based on ccu reset table defined from CLK driver. Select DM_RESET via CLK_SUNXI, this make hidden section of RESET since CLK and RESET share common DT compatible and code. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/include/asm/arch-sunxi/ccu.h33
1 files changed, 32 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-sunxi/ccu.h b/arch/arm/include/asm/arch-sunxi/ccu.h
index 24efe0ab0a1..5dd97ab2273 100644
--- a/arch/arm/include/asm/arch-sunxi/ccu.h
+++ b/arch/arm/include/asm/arch-sunxi/ccu.h
@@ -8,12 +8,14 @@
#define _ASM_ARCH_CCU_H
/**
- * enum ccu_flags - ccu clock flags
+ * enum ccu_flags - ccu clock/reset flags
*
* @CCU_CLK_F_IS_VALID: is given clock gate is valid?
+ * @CCU_RST_F_IS_VALID: is given reset control is valid?
*/
enum ccu_flags {
CCU_CLK_F_IS_VALID = BIT(0),
+ CCU_RST_F_IS_VALID = BIT(1),
};
/**
@@ -35,12 +37,32 @@ struct ccu_clk_gate {
}
/**
+ * struct ccu_reset - ccu reset
+ * @off: reset offset
+ * @bit: reset bit
+ * @flags: ccu reset control flags
+ */
+struct ccu_reset {
+ u16 off;
+ u32 bit;
+ enum ccu_flags flags;
+};
+
+#define RESET(_off, _bit) { \
+ .off = _off, \
+ .bit = _bit, \
+ .flags = CCU_RST_F_IS_VALID, \
+}
+
+/**
* struct ccu_desc - clock control unit descriptor
*
* @gates: clock gates
+ * @resets: reset unit
*/
struct ccu_desc {
const struct ccu_clk_gate *gates;
+ const struct ccu_reset *resets;
};
/**
@@ -62,4 +84,13 @@ int sunxi_clk_probe(struct udevice *dev);
extern struct clk_ops sunxi_clk_ops;
+/**
+ * sunxi_reset_bind() - reset binding
+ *
+ * @dev: reset device
+ * @count: reset count
+ * @return 0 success, or error value
+ */
+int sunxi_reset_bind(struct udevice *dev, ulong count);
+
#endif /* _ASM_ARCH_CCU_H */