ppc4xx: Big cleanup of PPC4xx defines

This patch cleans up multiple issues of the 4xx register (mostly
DCR, SDR, CPR, etc) definitions:

- Change lower case defines to upper case (plb4_acr -> PLB4_ACR)
- Change the defines to better match the names from the
  user's manuals (e.g. cprpllc -> CPR0_PLLC)
- Removal of some unused defines

Please test this patch intensive on your PPC4xx platform. Even though
I tried not to break anything and tested successfully on multiple
4xx AMCC platforms, testing on custom platforms is recommended.

Signed-off-by: Stefan Roese <sr@denx.de>

2 files changed, 12 insertions, 12 deletions

diff --git a/board/amcc/bubinga/bubinga.c b/board/amcc/bubinga/bubinga.c
index 74a2a1c2144..d0aebec2cd4 100644
--- a/board/amcc/bubinga/bubinga.c
+++ b/board/amcc/bubinga/bubinga.c
@@ -41,9 +41,9 @@ int board_early_init_f(void)
 	 * and enable the internal PCI arbiter if selected
 	 */
 	if (in_8((void *)FPGA_REG1) & FPGA_REG1_PCI_INT_ARB)
-		mtdcr(cpc0_pci, CPC0_PCI_HOST_CFG_EN | CPC0_PCI_ARBIT_EN);
+		mtdcr(CPC0_PCI, CPC0_PCI_HOST_CFG_EN | CPC0_PCI_ARBIT_EN);
 	else
-		mtdcr(cpc0_pci, CPC0_PCI_HOST_CFG_EN);
+		mtdcr(CPC0_PCI, CPC0_PCI_HOST_CFG_EN);
 
 	return 0;
 }
diff --git a/board/amcc/bubinga/flash.c b/board/amcc/bubinga/flash.c
index a10babbf739..baf89d5483f 100644
--- a/board/amcc/bubinga/flash.c
+++ b/board/amcc/bubinga/flash.c
@@ -106,25 +106,25 @@ unsigned long flash_init(void)
 		/* Re-do sizing to get full correct info */
 
 		if (size_b1) {
-			mtdcr(ebccfga, pb0cr);
-			pbcr = mfdcr(ebccfgd);
-			mtdcr(ebccfga, pb0cr);
+			mtdcr(EBC0_CFGADDR, PB0CR);
+			pbcr = mfdcr(EBC0_CFGDATA);
+			mtdcr(EBC0_CFGADDR, PB0CR);
 			base_b1 = -size_b1;
 			pbcr = (pbcr & 0x0001ffff) | base_b1 |
 			    (((size_b1 / 1024 / 1024) - 1) << 17);
-			mtdcr(ebccfgd, pbcr);
-			/*          printf("pb1cr = %x\n", pbcr); */
+			mtdcr(EBC0_CFGDATA, pbcr);
+			/*          printf("PB1CR = %x\n", pbcr); */
 		}
 
 		if (size_b0) {
-			mtdcr(ebccfga, pb1cr);
-			pbcr = mfdcr(ebccfgd);
-			mtdcr(ebccfga, pb1cr);
+			mtdcr(EBC0_CFGADDR, PB1CR);
+			pbcr = mfdcr(EBC0_CFGDATA);
+			mtdcr(EBC0_CFGADDR, PB1CR);
 			base_b0 = base_b1 - size_b0;
 			pbcr = (pbcr & 0x0001ffff) | base_b0 |
 			    (((size_b0 / 1024 / 1024) - 1) << 17);
-			mtdcr(ebccfgd, pbcr);
-			/*            printf("pb0cr = %x\n", pbcr); */
+			mtdcr(EBC0_CFGDATA, pbcr);
+			/*            printf("PB0CR = %x\n", pbcr); */
 		}
 
 		size_b0 = flash_get_size((vu_long *) base_b0, &flash_info[0]);