diff options
author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /board/cogent/README | |
parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'board/cogent/README')
-rw-r--r-- | board/cogent/README | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/board/cogent/README b/board/cogent/README index e6eef662c9b..31ca187b59b 100644 --- a/board/cogent/README +++ b/board/cogent/README @@ -80,16 +80,16 @@ To configure, perform the usual U-Boot configuration task of editing "include/config_cogent_mpc8xx.h" and reviewing all the options and settings in there. In particular, check the chip select values installed into the memory controller's various option and base -registers - these are set by the defines CFG_CMA_CSn_{BASE,SIZE} and -CFG_{B,O}Rn_PRELIM. Also be careful of the clock settings installed -into the SCCR - via the define CFG_SCCR. Finally, decide whether you +registers - these are set by the defines CONFIG_SYS_CMA_CSn_{BASE,SIZE} and +CONFIG_SYS_{B,O}Rn_PRELIM. Also be careful of the clock settings installed +into the SCCR - via the define CONFIG_SYS_SCCR. Finally, decide whether you want the serial console on motherboard serial port A or on one of the 8xx SMC ports, and set CONFIG_8xx_CONS_{SMC1,SMC2,NONE} accordingly (NONE means use Cogent motherboard serial port A). Then edit the file "cogent/config.mk". Firstly, set TEXT_BASE to be the base address of the EPROM for the CPU module. This should be the -same as the value selected for CFG_MONITOR_BASE in +same as the value selected for CONFIG_SYS_MONITOR_BASE in "include/config_cogent_*.h" (in fact, I have made this automatic via the -DTEXT_BASE=... option in CPPFLAGS). |