diff options
| author | Stefan Roese <sr@denx.de> | 2009-09-24 09:55:50 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2009-09-28 10:45:42 +0200 |
| commit | 952e7760bfc5b0e3b142b9ce34e7fbb7d008c900 (patch) | |
| tree | abd867c1a44dbc20bbd970c36c76f0355adc6df4 /board/cray | |
| parent | 984f10baac8ef6032df52f135943d6b0bc96f724 (diff) | |
ppc4xx: Convert PPC4xx UIC defines from lower case to upper case
The latest PPC4xx register cleanup patch missed the UIC defines.
This patch now changes lower case UIC defines to upper case.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/cray')
| -rw-r--r-- | board/cray/L1/L1.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/board/cray/L1/L1.c b/board/cray/L1/L1.c index 5d1c4170dd1..79130711d46 100644 --- a/board/cray/L1/L1.c +++ b/board/cray/L1/L1.c @@ -113,13 +113,13 @@ int board_early_init_f (void) { /* Running from ROM: global data is still READONLY */ init_sdram (); - mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */ - mtdcr (uicer, 0x00000000); /* disable all ints */ - mtdcr (uiccr, 0x00000020); /* set all but FPGA SMI to be non-critical */ - mtdcr (uicpr, 0xFFFFFFE0); /* set int polarities */ - mtdcr (uictr, 0x10000000); /* set int trigger levels */ - mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */ - mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */ + mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */ + mtdcr (UIC0ER, 0x00000000); /* disable all ints */ + mtdcr (UIC0CR, 0x00000020); /* set all but FPGA SMI to be non-critical */ + mtdcr (UIC0PR, 0xFFFFFFE0); /* set int polarities */ + mtdcr (UIC0TR, 0x10000000); /* set int trigger levels */ + mtdcr (UIC0VCR, 0x00000001); /* set vect base=0,INT0 highest priority */ + mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */ return 0; } |