PMC405 and CPCI405: Moved configuration of pci resources into config file.

PMC405 and CPCI2DP: Added firmware download and booting via pci.

Patch by Matthias Fuchs, 20 Dec 2005

5 files changed, 191 insertions, 49 deletions

diff --git a/board/esd/common/cmd_loadpci.c b/board/esd/common/cmd_loadpci.c
new file mode 100644
index 00000000000..3478f825c50
--- /dev/null
+++ b/board/esd/common/cmd_loadpci.c
@@ -0,0 +1,123 @@
+/*
+ * (C) Copyright 2005
+ * Matthias Fuchs, esd GmbH Germany, matthias.fuchs@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <command.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_BSP)
+
+extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
+extern int do_autoscript (cmd_tbl_t *, int, int, char *[]);
+
+#define ADDRMASK 0xfffff000
+
+/*
+ * Command loadpci: wait for signal from host and boot image.
+ */
+int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+	unsigned int *ptr = 0;
+	int count = 0;
+	int count2 = 0;
+	char addr[16];
+	char str[] = "\\|/-";
+	char *local_args[2];
+
+	while(1) {
+		/*
+		 * Mark sync address
+		 */
+		ptr = 0;
+		memset(ptr, 0, 0x20);
+
+		*ptr = 0xffffffff;
+		puts("\nWaiting for action from pci host -");
+
+		/*
+		 * Wait for host to write the start address
+		 */
+		while (*ptr == 0xffffffff) {
+			count++;
+			if (!(count % 100)) {
+				count2++;
+				putc(0x08); /* backspace */
+				putc(str[count2 % 4]);
+			}
+
+			/* Abort if ctrl-c was pressed */
+			if (ctrlc()) {
+				puts("\nAbort\n");
+				return 0;
+			}
+
+			udelay(1000);
+		}
+
+		printf("\nGot bootcode %08x: ", *ptr);
+		sprintf(addr, "%08x", *ptr & ADDRMASK);
+
+		switch (*ptr & ~ADDRMASK) {
+		case 0:
+			/*
+			 * Boot image via bootm
+			 */
+			printf("booting image at addr 0x%s ...\n", addr);
+			setenv("loadaddr", addr);
+
+			do_bootm (cmdtp, 0, 0, NULL);
+			break;
+
+		case 1:
+			/*
+			 * Boot image via autoscr
+			 */
+			printf("executing script at addr 0x%s ...\n", addr);
+
+			local_args[0] = addr;
+			local_args[1] = NULL;
+			do_autoscript(cmdtp, 0, 1, local_args);
+			break;
+
+		case 2:
+			/*
+			 * Call run_cmd
+			 */
+			printf("running command at addr 0x%s ...\n", addr);
+			run_command ((char*)(*ptr & ADDRMASK), 0);
+			break;
+
+		default:
+			printf("unhandled boot method\n");
+			break;
+		}
+	}
+}
+
+U_BOOT_CMD(
+	loadpci,	1,	1,	do_loadpci,
+	"loadpci - Wait for pci bootcmd and boot it\n",
+	NULL
+	);
+
+#endif
+
diff --git a/board/esd/cpci2dp/Makefile b/board/esd/cpci2dp/Makefile
index a60495a59aa..88b0ae3435e 100644
--- a/board/esd/cpci2dp/Makefile
+++ b/board/esd/cpci2dp/Makefile
@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
 
 LIB	= lib$(BOARD).a
 
-OBJS	= $(BOARD).o flash.o ../common/misc.o
+OBJS	= $(BOARD).o flash.o ../common/misc.o ../common/cmd_loadpci.o
 
 $(LIB):	$(OBJS) $(SOBJS)
 	$(AR) crv $@ $(OBJS)
diff --git a/board/esd/cpci2dp/cpci2dp.c b/board/esd/cpci2dp/cpci2dp.c
index df10c0e6aa3..2800420e2af 100644
--- a/board/esd/cpci2dp/cpci2dp.c
+++ b/board/esd/cpci2dp/cpci2dp.c
@@ -31,17 +31,15 @@ int board_early_init_f (void)
 	unsigned long cntrl0Reg;
 
 	/*
-	 * Setup GPIO pins (CS4+CS7 as GPIO)
+	 * Setup GPIO pins
 	 */
 	cntrl0Reg = mfdcr(cntrl0);
-	mtdcr(cntrl0, cntrl0Reg | 0x00900000);
+	mtdcr(cntrl0, cntrl0Reg | ((CFG_EEPROM_WP | CFG_PB_LED | CFG_SELF_RST | CFG_INTA_FAKE) << 5));
 
-	/* set output pins to high */
-	out32(GPIO0_OR,	 CFG_INTA_FAKE | CFG_EEPROM_WP | CFG_PB_LED);
-	/* INTA# is open drain */
-	out32(GPIO0_ODR, CFG_INTA_FAKE);
-	/* setup for output */
-	out32(GPIO0_TCR, CFG_INTA_FAKE | CFG_EEPROM_WP);
+        /* set output pins to high */
+	out32(GPIO0_OR,  CFG_EEPROM_WP);
+        /* setup for output (LED=off) */
+	out32(GPIO0_TCR, CFG_EEPROM_WP | CFG_PB_LED);
 
 	/*
 	 * IRQ 0-15  405GP internally generated; active high; level sensitive
@@ -130,16 +128,6 @@ long int initdram (int board_type)
 
 /* ------------------------------------------------------------------------- */
 
-int testdram (void)
-{
-	/* TODO: XXX XXX XXX */
-	printf ("test: 64 MB - ok\n");
-
-	return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
 #if defined(CFG_EEPROM_WREN)
 /* Input: <dev_addr>  I2C address of EEPROM device to enable.
  *	   <state>     -1: deliver current state
@@ -207,8 +195,8 @@ int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 }
 
 U_BOOT_CMD(
-	   eepwren,	2,	0,	do_eep_wren,
-	   "eepwren - Enable / disable / query EEPROM write access\n",
-	   NULL
-	   );
+	eepwren,	2,	0,	do_eep_wren,
+	"eepwren - Enable / disable / query EEPROM write access\n",
+	NULL
+	);
 #endif /* #if defined(CFG_EEPROM_WREN) */
diff --git a/board/esd/pmc405/Makefile b/board/esd/pmc405/Makefile
index 1281be70bec..741e4aacdcd 100644
--- a/board/esd/pmc405/Makefile
+++ b/board/esd/pmc405/Makefile
@@ -30,7 +30,7 @@ CPLD    = ../common/xilinx_jtag/lenval.o \
 	  ../common/xilinx_jtag/micro.o \
 	  ../common/xilinx_jtag/ports.o
 
-OBJS	= $(BOARD).o ../common/misc.o $(CPLD)
+OBJS	= $(BOARD).o ../common/misc.o ../common/cmd_loadpci.o $(CPLD)
 
 $(LIB):	$(OBJS) $(SOBJS)
 	$(AR) crv $@ $(OBJS)
diff --git a/board/esd/pmc405/pmc405.c b/board/esd/pmc405/pmc405.c
index 33b5f774d57..f9e4d4377c6 100644
--- a/board/esd/pmc405/pmc405.c
+++ b/board/esd/pmc405/pmc405.c
@@ -1,6 +1,9 @@
 /*
  * (C) Copyright 2001-2003
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * (C) Copyright 2005
+ * Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -66,16 +69,27 @@ int board_early_init_f (void)
 	mtebc (epcr, 0xa8400000);
 
 	/*
-	 * Setup GPIO pins (CS6+CS7 as GPIO)
+	 * Setup GPIO pins
 	 */
-	mtdcr(cntrl0, mfdcr(cntrl0) | 0x00300000);
 
-	/*
-	 * Configure GPIO pins
+	mtdcr(cntrl0, mfdcr(cntrl0) | ((CFG_FPGA_INIT | \
+					CFG_FPGA_DONE | \
+					CFG_XEREADY | \
+					CFG_NONMONARCH | \
+					CFG_REV1_2) << 5));
+
+	if (!(in32(GPIO0_IR) & CFG_REV1_2)) {
+		/* rev 1.2 boards */
+		mtdcr(cntrl0, mfdcr(cntrl0) | ((CFG_INTA_FAKE | \
+						CFG_SELF_RST) << 5));
+	}
+
+	out32(GPIO0_OR, 0);
+	out32(GPIO0_TCR, CFG_FPGA_PRG | CFG_FPGA_CLK | CFG_FPGA_DATA | CFG_XEREADY); /* setup for output */
+
+	/* - check if rev1_2 is low, then:
+	 * - set/reset CFG_INTA_FAKE/CFG_SELF_RST in TCR to assert INTA# or SELFRST#
 	 */
-	out32(GPIO0_ODR, 0x00000000);                                /* no open drain pins */
-	out32(GPIO0_TCR, CFG_FPGA_PRG | CFG_FPGA_CLK | CFG_FPGA_DATA); /* setup for output */
-	out32(GPIO0_OR, 0);                                            /* outputs -> low   */
 
 	return 0;
 }
@@ -83,11 +97,6 @@ int board_early_init_f (void)
 
 /* ------------------------------------------------------------------------- */
 
-int misc_init_f (void)
-{
-	return 0;  /* dummy implementation */
-}
-
 
 int misc_init_r (void)
 {
@@ -97,16 +106,30 @@ int misc_init_r (void)
 	gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
 	gd->bd->bi_flashoffset = 0;
 
+	out32(GPIO0_OR, in32(GPIO0_OR) | CFG_XEREADY); /* deassert EREADY# */
 	return (0);
 }
 
+ushort pmc405_pci_subsys_deviceid(void)
+{
+	ulong val;
+	val = in32(GPIO0_IR);
+	if (!(val & CFG_REV1_2)) { /* low=rev1.2 */
+		if (val & CFG_NONMONARCH) { /* monarch# signal */
+			return CFG_PCI_SUBSYS_DEVICEID_NONMONARCH;
+		}
+		return CFG_PCI_SUBSYS_DEVICEID_MONARCH;
+	}
+	return CFG_PCI_SUBSYS_DEVICEID_NONMONARCH;
+}
 
 /*
  * Check Board Identity:
  */
-
 int checkboard (void)
 {
+	ulong val;
+
 	char str[64];
 	int i = getenv_r ("serial#", str, sizeof(str));
 
@@ -118,12 +141,18 @@ int checkboard (void)
 		puts(str);
 	}
 
-	putc ('\n');
+	val = in32(GPIO0_IR);
+	if (!(val & CFG_REV1_2)) { /* low=rev1.2 */
+		puts(" rev1.2 (");
+		if (val & CFG_NONMONARCH) { /* monarch# signal */
+			puts("non-");
+		}
+		puts("monarch)");
+	} else {
+		puts(" <=rev1.1");
+	}
 
-	/*
-	 * Disable sleep mode in LXT971
-	 */
-	lxt971_no_sleep();
+	putc ('\n');
 
 	return 0;
 }
@@ -145,17 +174,19 @@ long int initdram (int board_type)
 	return (4*1024*1024 << ((val & 0x000e0000) >> 17));
 }
 
-/* ------------------------------------------------------------------------- */
 
-int testdram (void)
+/* ------------------------------------------------------------------------- */
+void reset_phy(void)
 {
-	/* TODO: XXX XXX XXX */
-	printf ("test: 16 MB - ok\n");
+#ifdef CONFIG_LXT971_NO_SLEEP
 
-	return (0);
+	/*
+	 * Disable sleep mode in LXT971
+	 */
+	lxt971_no_sleep();
+#endif
 }
 
-/* ------------------------------------------------------------------------- */
 
 int do_cantest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {