diff options
| author | Kumar Gala <galak@kernel.crashing.org> | 2008-01-30 14:55:14 -0600 |
|---|---|---|
| committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2008-03-26 11:43:03 -0500 |
| commit | f69766e4b5d47ecd3aa58677a8da875694f364f2 (patch) | |
| tree | fc82b58b6400277e2ff661029402bf4a4758c5d9 /board/freescale/mpc8568mds | |
| parent | 5b5eb9ca5b778f763bcf332697b35cc1e747626e (diff) | |
85xx: Add the concept of CFG_CCSRBAR_PHYS
When we go to 36-bit physical addresses we need to keep the concept of
the physical CCSRBAR address seperate from the virtual one.
For the majority of boards CFG_CCSBAR_PHYS == CFG_CCSRBAR
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/mpc8568mds')
| -rw-r--r-- | board/freescale/mpc8568mds/tlb.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/freescale/mpc8568mds/tlb.c b/board/freescale/mpc8568mds/tlb.c index 225fc9465e1..a866c526c8d 100644 --- a/board/freescale/mpc8568mds/tlb.c +++ b/board/freescale/mpc8568mds/tlb.c @@ -74,7 +74,7 @@ struct fsl_e_tlb_entry tlb_table[] = { * 0xe200_0000 8M PCI1 IO * 0xe280_0000 8M PCIe IO */ - SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR, + SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 3, BOOKE_PAGESZ_64M, 1), |