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authorPriyanka Jain <Priyanka.Jain@freescale.com>2014-01-30 15:39:58 +0530
committerYork Sun <yorksun@freescale.com>2014-03-07 14:53:29 -0800
commitbf4699db852f88b0a30b9d7e8b1bea83d01c0d92 (patch)
tree37f0fc6ca9fd11986e690cfe9f3bc4a1eb1441af /board/freescale/t1040qds/t1040qds.h
parent8d67c3685e3b4bea8524e2e25b1443b62a69352b (diff)
powerpc/mpc85xx: Add SCFG_PIXCLKCR register support for T1040
T1040 SoC has SCFG (Supplement Configuration) Block which provides chip specific configuration and status support. The base address of SCFG block in T1040 is 0xfc000. SCFG contains SCFG_PIXCLKCR (DIU pixel clock control register) at offset 0x28. Add definition of -SCFG block -SCFG_PIXCLKCR register -Bits definition of SCFG_PIXCLK register Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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