summaryrefslogtreecommitdiff
path: root/board/freescale
diff options
context:
space:
mode:
authorPriyanka Jain <Priyanka.Jain@freescale.com>2014-01-30 11:30:04 +0530
committerYork Sun <yorksun@freescale.com>2014-02-03 08:38:49 -0800
commit714fd406daab6a98b2ee8d301c4888c113fdd818 (patch)
treef2e6e4177187130793f40459cb47971c691516ce /board/freescale
parenta4f7cba64e1f7b61b174c3cc480f389b002a0ff8 (diff)
powerpc/t104xrdb: Add basic ethernet support
This covers only non-L2 switch ethernet interfaces i.e. RGMII and SGMII interface for both T1040RDB and T1042RDB_PI T1040RDB is configured as serdes protocol 0x66 which can support following interfaces 2 RGMIIS on DTSEC4, DTSEC5 1 SGMII on DTSEC3 T1042RDB_PI is configured as serdes protocol 0x06 which can support following interfaces 2 RGMIIS on DTSEC4, DTSEC5 Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> [York Sun: Minor change in commit message] Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board/freescale')
-rw-r--r--board/freescale/t104xrdb/Makefile1
-rw-r--r--board/freescale/t104xrdb/eth.c72
2 files changed, 73 insertions, 0 deletions
diff --git a/board/freescale/t104xrdb/Makefile b/board/freescale/t104xrdb/Makefile
index 76c0c94b0e1..e51fb7a7f45 100644
--- a/board/freescale/t104xrdb/Makefile
+++ b/board/freescale/t104xrdb/Makefile
@@ -7,6 +7,7 @@
obj-y += t104xrdb.o
obj-y += ddr.o
+obj-y += eth.o
obj-$(CONFIG_PCI) += pci.o
obj-y += law.o
obj-y += tlb.o
diff --git a/board/freescale/t104xrdb/eth.c b/board/freescale/t104xrdb/eth.c
new file mode 100644
index 00000000000..0188fd4090b
--- /dev/null
+++ b/board/freescale/t104xrdb/eth.c
@@ -0,0 +1,72 @@
+/*
+ * Copyright 2014 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <netdev.h>
+#include <asm/immap_85xx.h>
+#include <fm_eth.h>
+#include <fsl_mdio.h>
+#include <malloc.h>
+#include <asm/fsl_dtsec.h>
+
+#include "../common/fman.h"
+
+int board_eth_init(bd_t *bis)
+{
+#ifdef CONFIG_FMAN_ENET
+ struct memac_mdio_info memac_mdio_info;
+ unsigned int i;
+ int phy_addr = 0;
+ printf("Initializing Fman\n");
+
+ memac_mdio_info.regs =
+ (struct memac_mdio_controller *)CONFIG_SYS_FM1_DTSEC_MDIO_ADDR;
+ memac_mdio_info.name = DEFAULT_FM_MDIO_NAME;
+
+ /* Register the real 1G MDIO bus */
+ fm_memac_mdio_init(bis, &memac_mdio_info);
+
+ /*
+ * Program on board RGMII, SGMII PHY addresses.
+ */
+ for (i = FM1_DTSEC1; i < FM1_DTSEC1 + CONFIG_SYS_NUM_FM1_DTSEC; i++) {
+ int idx = i - FM1_DTSEC1;
+
+ switch (fm_info_get_enet_if(i)) {
+#ifdef CONFIG_T1040RDB
+ case PHY_INTERFACE_MODE_SGMII:
+ /* T1040RDB only supports SGMII on DTSEC3 */
+ fm_info_set_phy_address(FM1_DTSEC3,
+ CONFIG_SYS_SGMII1_PHY_ADDR);
+#endif
+ case PHY_INTERFACE_MODE_RGMII:
+ if (FM1_DTSEC4 == i)
+ phy_addr = CONFIG_SYS_RGMII1_PHY_ADDR;
+ if (FM1_DTSEC5 == i)
+ phy_addr = CONFIG_SYS_RGMII2_PHY_ADDR;
+ fm_info_set_phy_address(i, phy_addr);
+ break;
+ case PHY_INTERFACE_MODE_QSGMII:
+ fm_info_set_phy_address(i, 0);
+ break;
+ case PHY_INTERFACE_MODE_NONE:
+ fm_info_set_phy_address(i, 0);
+ break;
+ default:
+ printf("Fman1: DTSEC%u set to unknown interface %i\n",
+ idx + 1, fm_info_get_enet_if(i));
+ fm_info_set_phy_address(i, 0);
+ break;
+ }
+ fm_info_set_mdio(i,
+ miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME));
+ }
+
+ cpu_eth_init(bis);
+#endif
+
+ return pci_eth_init(bis);
+}