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authorStefan Roese <sr@denx.de>2009-09-09 16:25:29 +0200
committerStefan Roese <sr@denx.de>2009-09-11 10:35:58 +0200
commitd1c3b27525b664e8c4db6bb173eed51bfc8220de (patch)
treec00f3d0bcfbd5fcc1954cc9cefdbc4c9c41f41ea /board/jse/jse.c
parente7963772eb78a6aa1fa65063d64eab3a8626daac (diff)
ppc4xx: Big cleanup of PPC4xx defines
This patch cleans up multiple issues of the 4xx register (mostly DCR, SDR, CPR, etc) definitions: - Change lower case defines to upper case (plb4_acr -> PLB4_ACR) - Change the defines to better match the names from the user's manuals (e.g. cprpllc -> CPR0_PLLC) - Removal of some unused defines Please test this patch intensive on your PPC4xx platform. Even though I tried not to break anything and tested successfully on multiple 4xx AMCC platforms, testing on custom platforms is recommended. Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/jse/jse.c')
-rw-r--r--board/jse/jse.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/board/jse/jse.c b/board/jse/jse.c
index 6a6b9dd74b3..6dc9a01af8f 100644
--- a/board/jse/jse.c
+++ b/board/jse/jse.c
@@ -62,12 +62,12 @@ int board_early_init_f (void)
/* EBC0_B1AP: BME=1, TWT=2, CSN=0, OEN=1,
WBN=0, WBF=1, TH=0, RE=0, SOR=0, BEM=0, PEN=0 */
- mtdcr (ebccfga, pb1ap);
- mtdcr (ebccfgd, 0x01011000);
+ mtdcr (EBC0_CFGADDR, PB1AP);
+ mtdcr (EBC0_CFGDATA, 0x01011000);
/* EBC0_B1CR: BAS=x, BS=0(1MB), BU=3(R/W), BW=0(8bits) */
- mtdcr (ebccfga, pb1cr);
- mtdcr (ebccfgd, CONFIG_SYS_SYSTEMACE_BASE | 0x00018000);
+ mtdcr (EBC0_CFGADDR, PB1CR);
+ mtdcr (EBC0_CFGDATA, CONFIG_SYS_SYSTEMACE_BASE | 0x00018000);
/* Enable the /PerWE output as /PerWE, instead of /PCIINT. */
/* CPC0_CR1 |= PCIPW */