kmp204x: complete the reset sequence and PRST configuration

This adds the reset support for the following devices that was until
then not implemented:
- BFTIC4
- QSFPs

This also fixes the configuration of the prst behaviour for the other
resets: Only the u-boot and kernel relevant subsystems are taken out of
reset (pcie, ZL30158, and front eth phy).

Most of the prst config move to misc_init_f(), except for the PCIe
related ones that are in pci_init_board and the bftic and ZL30158 ones
that should be done as soon as possible.

Only the behavior of the Hooper reset is changed according to the
documentation as the application is not able to not configure the switch
when it is not reset.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>

4 files changed, 45 insertions, 19 deletions

diff --git a/board/keymile/kmp204x/kmp204x.c b/board/keymile/kmp204x/kmp204x.c
index 1ce8429075f..6bc8eb85eaa 100644
--- a/board/keymile/kmp204x/kmp204x.c
+++ b/board/keymile/kmp204x/kmp204x.c
@@ -79,7 +79,7 @@ int get_scl(void)
 
 
 #define ZL30158_RST	8
-#define ZL30343_RST	9
+#define BFTIC4_RST	0
 
 int board_early_init_f(void)
 {
@@ -88,13 +88,15 @@ int board_early_init_f(void)
 	/* board only uses the DDR_MCK0, so disable the DDR_MCK1/2/3 */
 	setbits_be32(&gur->ddrclkdr, 0x001f000f);
 
-	/* take the Zarlinks out of reset as soon as possible */
-	qrio_prst(ZL30158_RST, false, false);
-	qrio_prst(ZL30343_RST, false, false);
+	/* set the BFTIC's prstcfg to reset at power-up and unit reset only */
+	qrio_prstcfg(BFTIC4_RST, PRSTCFG_POWUP_UNIT_RST);
+	/* and enable WD on it */
+	qrio_wdmask(BFTIC4_RST, true);
 
-	/* and set their reset to power-up only */
-	qrio_prstcfg(ZL30158_RST, PRSTCFG_POWUP_RST);
-	qrio_prstcfg(ZL30343_RST, PRSTCFG_POWUP_RST);
+	/* set the ZL30138's prstcfg to reset at power-up and unit reset only */
+	qrio_prstcfg(ZL30158_RST, PRSTCFG_POWUP_UNIT_RST);
+	/* and take it out of reset as soon as possible (needed for Hooper) */
+	qrio_prst(ZL30158_RST, false, false);
 
 	return 0;
 }
@@ -127,16 +129,37 @@ unsigned long get_board_sys_clk(unsigned long dummy)
 	return 66666666;
 }
 
+#define ETH_FRONT_PHY_RST	15
+#define QSFP2_RST		11
+#define QSFP1_RST		10
+#define ZL30343_RST		9
+
 int misc_init_f(void)
 {
 	/* configure QRIO pis for i2c deblocking */
 	i2c_deblock_gpio_cfg();
 
+	/* configure the front phy's prstcfg and take it out of reset */
+	qrio_prstcfg(ETH_FRONT_PHY_RST, PRSTCFG_POWUP_UNIT_CORE_RST);
+	qrio_prst(ETH_FRONT_PHY_RST, false, false);
+
+	/* set the ZL30343 prstcfg to reset at power-up and unit reset only */
+	qrio_prstcfg(ZL30343_RST, PRSTCFG_POWUP_UNIT_RST);
+	/* and enable the WD on it */
+	qrio_wdmask(ZL30343_RST, true);
+
+	/* set the QSFPs' prstcfg to reset at power-up and unit rst only */
+	qrio_prstcfg(QSFP1_RST, PRSTCFG_POWUP_UNIT_RST);
+	qrio_prstcfg(QSFP2_RST, PRSTCFG_POWUP_UNIT_RST);
+
+	/* and enable the WD on them */
+	qrio_wdmask(QSFP1_RST, true);
+	qrio_wdmask(QSFP2_RST, true);
+
 	return 0;
 }
 
 #define NUM_SRDS_BANKS	2
-#define PHY_RST		15
 
 int misc_init_r(void)
 {
@@ -157,9 +180,6 @@ int misc_init_r(void)
 		}
 	}
 
-	/* take the mgmt eth phy out of reset */
-	qrio_prst(PHY_RST, false, false);
-
 	return 0;
 }
 
@@ -172,6 +192,7 @@ int hush_init_var(void)
 #endif
 
 #if defined(CONFIG_LAST_STAGE_INIT)
+
 int last_stage_init(void)
 {
 #if defined(CONFIG_KMCOGE4)
@@ -187,6 +208,7 @@ int last_stage_init(void)
 	}
 #endif
 	set_km_env();
+
 	return 0;
 }
 #endif
diff --git a/board/keymile/kmp204x/kmp204x.h b/board/keymile/kmp204x/kmp204x.h
index 720e2256131..afede994f17 100644
--- a/board/keymile/kmp204x/kmp204x.h
+++ b/board/keymile/kmp204x/kmp204x.h
@@ -20,6 +20,7 @@ void qrio_gpio_direction_input(u8 port_off, u8 gpio_nr);
 #define PRSTCFG_POWUP_RST		0x3
 
 void qrio_prst(u8 bit, bool en, bool wden);
+void qrio_wdmask(u8 bit, bool wden);
 void qrio_prstcfg(u8 bit, u8 mode);
 void qrio_set_leds(void);
 void qrio_enable_app_buffer(void);
diff --git a/board/keymile/kmp204x/pci.c b/board/keymile/kmp204x/pci.c
index a484eb57495..2b0b054a11c 100644
--- a/board/keymile/kmp204x/pci.c
+++ b/board/keymile/kmp204x/pci.c
@@ -94,20 +94,23 @@ err_out:
 }
 
 #define PCIE_SW_RST	14
-#define PEXHC_SW_RST	13
-#define HOOPER_SW_RST	12
+#define PEXHC_RST	13
+#define HOOPER_RST	12
 
 void pci_init_board(void)
 {
-	/* first wait for the PCIe FPGA to be configured
+	qrio_prstcfg(PCIE_SW_RST, PRSTCFG_POWUP_UNIT_CORE_RST);
+	qrio_prstcfg(PEXHC_RST, PRSTCFG_POWUP_UNIT_CORE_RST);
+	qrio_prstcfg(HOOPER_RST, PRSTCFG_POWUP_UNIT_CORE_RST);
+
+	/* wait for the PCIe FPGA to be configured
 	 * it has been triggered earlier in board_early_init_r */
-	int ret = wait_for_fpga_config();
-	if (ret)
+	if (wait_for_fpga_config())
 		printf("error finishing PCIe FPGA config\n");
 
 	qrio_prst(PCIE_SW_RST, false, false);
-	qrio_prst(PEXHC_SW_RST, false, false);
-	qrio_prst(HOOPER_SW_RST, false, false);
+	qrio_prst(PEXHC_RST, false, false);
+	qrio_prst(HOOPER_RST, false, false);
 	/* Hooper is not direcly PCIe capable */
 	mdelay(50);
 
diff --git a/board/keymile/kmp204x/qrio.c b/board/keymile/kmp204x/qrio.c
index 08d5ca43dfd..b6ba93ada8f 100644
--- a/board/keymile/kmp204x/qrio.c
+++ b/board/keymile/kmp204x/qrio.c
@@ -91,7 +91,7 @@ void qrio_set_opendrain_gpio(u8 port_off, u8 gpio_nr, u8 val)
 
 #define WDMASK_OFF	0x16
 
-static void qrio_wdmask(u8 bit, bool wden)
+void qrio_wdmask(u8 bit, bool wden)
 {
 	u16 wdmask;
 	void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE;