diff options
| author | Puneet Saxena <puneets@nvidia.com> | 2012-01-20 12:19:27 +0530 |
|---|---|---|
| committer | Puneet Saxena <puneets@nvidia.com> | 2012-02-06 22:22:25 -0800 |
| commit | 3847bc3cce6eed1edbec23cac715e34ffb463638 (patch) | |
| tree | b977b3892a88827cabe554ef6562edf10c37426f /board/nvidia | |
| parent | 0277eafa2b8d09853e089ade710e3e8d091b996c (diff) | |
Arm: tegra3: Add 16x8 keyboard support
Expand existing 4x6 keyboard support to 16x8 keyboard.
Add Tegra2 specific changes under Tegra2 config "CONFIG_TEGRA2".
BUG=chromium-os:23496
TEST=Tested on Waluigi.key press echoes the key on console.
Built ok for Cardhu and Seaboard.
Change-Id: Iab291a636d41b721d914014a5fe9ecc8775bf260
Signed-off-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/13928
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'board/nvidia')
| -rw-r--r-- | board/nvidia/cardhu/pinmux-config-common.h | 36 |
1 files changed, 25 insertions, 11 deletions
diff --git a/board/nvidia/cardhu/pinmux-config-common.h b/board/nvidia/cardhu/pinmux-config-common.h index 189568a9940..c07b61ad698 100644 --- a/board/nvidia/cardhu/pinmux-config-common.h +++ b/board/nvidia/cardhu/pinmux-config-common.h @@ -223,17 +223,31 @@ static struct pingroup_config tegra3_pinmux_common[] = { DEFAULT_PINMUX(JTAG_RTCK, RTCK, NORMAL, NORMAL, OUTPUT), /* KBC keys */ - DEFAULT_PINMUX(KB_ROW0, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_ROW1, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_ROW2, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_ROW3, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_COL0, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_COL1, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_COL2, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_COL3, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_COL4, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_COL5, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(GPIO_PV0, RSVD, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW0, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW1, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW2, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW3, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW4, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW5, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW6, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW7, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW8, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW9, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW10, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW11, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW12, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW13, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW14, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW15, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_COL0, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_COL1, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_COL2, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_COL3, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_COL4, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_COL5, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_COL6, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_COL7, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(GPIO_PV0, RSVD, UP, NORMAL, INPUT), DEFAULT_PINMUX(CLK_32K_OUT, BLINK, NORMAL, NORMAL, OUTPUT), DEFAULT_PINMUX(SYS_CLK_REQ, SYSCLK, NORMAL, NORMAL, OUTPUT), |